EPF10K30AQI240-3 Altera, EPF10K30AQI240-3 Datasheet - Page 126

IC FLEX 10KA FPGA 30K 240-PQFP

EPF10K30AQI240-3

Manufacturer Part Number
EPF10K30AQI240-3
Description
IC FLEX 10KA FPGA 30K 240-PQFP
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet

Specifications of EPF10K30AQI240-3

Number Of Logic Elements/cells
1728
Number Of Labs/clbs
216
Total Ram Bits
12288
Number Of I /o
189
Number Of Gates
69000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
240-MQFP, 240-PQFP
Family Name
FLEX 10KA
Number Of Usable Gates
30000
Number Of Logic Blocks/elements
1728
# Registers
738
# I/os (max)
189
Frequency (max)
125MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
3.3V
Logic Cells
1728
Ram Bits
12288
Device System Gates
69000
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1262

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0
Device Pin-
Outs
Revision
History
126
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Configuration device
Passive serial (PS)
Passive parallel asynchronous (PPA)
Passive parallel synchronous (PPS)
JTAG
Table 116. Data Sources for Configuration
Configuration Scheme
Multiple FLEX 10K devices can be configured in any of the five
configuration schemes by connecting the configuration enable (nCE) and
configuration enable output (nCEO) pins on each device.
See the Altera web site (http://www.altera.com) or the Altera Digital
Library for pin-out information.
The information contained in the FLEX 10K Embedded Programmable Logic
Device Family Data Sheet version 4.2 supersedes information published in
previous versions.
Version 4.2 Changes
The following change was made to version 4.2 of the FLEX 10K Embedded
Programmable Logic Device Family Data Sheet: updated
Version 4.1 Changes
The following changes were made to version 4.1 of the FLEX 10K
Embedded Programmable Logic Device Family Data Sheet.
Updated General Description section
Updated I/O Element section
Updated SameFrame Pin-Outs section
Updated Figure 16
Updated Tables 13 and 116
Added Note 9 to Table 19
Added Note 10 to Table 24
Added Note 10 to Table 28
EPC1, EPC2, EPC16, or EPC1441 configuration device
BitBlaster, MasterBlaster, or ByteBlasterMV download cable, or
serial data source
Parallel data source
Parallel data source
BitBlaster, MasterBlaster, or ByteBlasterMV download cable, or
microprocessor with Jam STAPL file or Jam Byte-Code file
Data Source
Figure
Altera Corporation
13.

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