EP3C10U256C6N Altera, EP3C10U256C6N Datasheet - Page 265
![IC CYCLONE III FPGA 10K 256-UBGA](/photos/6/73/67381/ep3c10u256c6n_sml.jpg)
EP3C10U256C6N
Manufacturer Part Number
EP3C10U256C6N
Description
IC CYCLONE III FPGA 10K 256-UBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C10U256C6N.pdf
(274 pages)
Specifications of EP3C10U256C6N
Number Of Logic Elements/cells
10320
Number Of Labs/clbs
645
Total Ram Bits
423936
Number Of I /o
182
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-UBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
10320
# I/os (max)
182
Frequency (max)
500MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
10320
Ram Bits
423936
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
UFBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2433
EP3C10U256C6N
EP3C10U256C6N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Chapter 11: SEU Mitigation in the Cyclone III Device Family
Chapter Revision History
Chapter Revision History
Table 11–9. Chapter Revision History
© December 2009
December 2009
July 2009
June 2009
October 2008
May 2008
July 2007
March 2007
Date
Altera Corporation
Table 11–9
Version
2.2
2.1
2.0
1.3
1.2
1.1
1.0
lists the revision history for this chapter.
Minor changes to the text.
Made minor correction to the part number.
■
■
■
■
■
■
■
■
■
Initial release.
Updated chapter part number.
Updated “Introduction” on page 11–1.
Updated Table 11–6 on page 11–6 and Table 11–8 on page 11–9.
Updated Figure 11–2 on page 11–7.
Updated “Accessing Error Detection Block Through User Logic” on
page 11–8.
Added chapter “Accessing Error Detection Block through User Logic” to
document.
Updated chapter to new template.
Updated Table 11-2.
Added chapter TOC to document.
Changes Made
Cyclone III Device Handbook, Volume 1
11–11
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