EP3C25F256C7N Altera, EP3C25F256C7N Datasheet - Page 92

IC CYCLONE III FPGA 256-FBGA

EP3C25F256C7N

Manufacturer Part Number
EP3C25F256C7N
Description
IC CYCLONE III FPGA 256-FBGA
Manufacturer
Altera
Series
Cyclone® IIIr

Specifications of EP3C25F256C7N

Number Of Logic Elements/cells
24624
Number Of Labs/clbs
1539
Total Ram Bits
608256
Number Of I /o
156
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
24624
# I/os (max)
156
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
24624
Ram Bits
608256
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
For Use With
544-2370 - KIT STARTER CYCLONE III EP3C25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
Q4433068

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5–28
Figure 5–23. Scan Chain Bit Order
Cyclone III Device Handbook, Volume 1
DATAOUT
HB
LB
0
0
HB
Table 5–4. Cyclone III Device Family PLL Reprogramming Bits (Part 2 of 2)
Figure 5–22
Figure 5–22. PLL Component Scan Chain Order
Figure 5–23
Cyclone III device family PLLs.
LB
1
1
N
Charge Pump
Loop Filter
Total number of bits:
Notes to
(1) LSB bit for C4 low-count value is the first bit shifted into the scan chain.
(2) These two control bits include rbypass, for bypassing the counter, and rselodd, to select the output clock
(3) MSB bit for loop filter is the last bit shifted into the scan chain.
Block Name
duty cycle.
DATAIN
HB
Table
LB
2
2
(3)
shows the scan chain order of the PLL components.
shows the scan chain bit order sequence for one PLL post-scale counter in
5–4:
HB
LB
3
3
DATAOUT
MSB
HB
LB
4
4
Counter
LF
16
9
9
HB
CP
LB
5
5
Chapter 5: Clock Networks and PLLs in the Cyclone III Device Family
C4
LSB
HB
LB
6
6
Number of Bits
HB
LB
7
7
C3
N
Other
2
0
0
(2)
HB
LB
8
8
© December 2009 Altera Corporation
C2
M
LB
HB
9
9
PLL Reconfiguration
rselodd
Total
C0
C1
rbypass
144
18
9
9
DATAIN

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