EP3C40F324I7N Altera, EP3C40F324I7N Datasheet - Page 52

• Manufacturer Part Number: EP3C40F324I7N
• Description: IC CYCLONE III FPGA 40K 324 FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C40F324I7N

• Number Of Logic Elements/cells: 39600
• Number Of Labs/clbs: 2475
• Total Ram Bits: 1161216
• Number Of I /o: 195
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 324-FBGA
• Family Name: Cyclone III
• Number Of Logic Blocks/elements: 39600
• # I/os (max): 195
• Frequency (max): 437.5MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 39600
• Ram Bits: 1161216
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Package Type: FBGA
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2547

2–8
Cyclone III Device Handbook, Volume 2
Table 2–9. Cyclone III LS Devices Pin Capacitance (Part 2 of 2)
C
C
C
C
Note to
(1) When you use the VREF pin as a regular input or output, you can expect a reduced performance of toggle rate and
Symbol
V REFLR
V REFTB
C LKTB
C LKLR
t
C O
(1)
(1)
due to higher pin capacitance.
Table
Input capacitance on left/right dual-purpose VREF pin
when used as V
Input capacitance on top/bottom dual-purpose VREF
pin when used as V
Input capacitance on top/bottom dedicated clock input
pins
Input capacitance on left/right dedicated clock input
pins
2–9:
REF
or user I/O pin
REF
Parameter
or user I/O pin
Chapter 2: Cyclone III LS Device Data Sheet
© December 2009 Altera Corporation
Typical –
QFP
21
23
7
6
Electrical Characteristics
Typical –
FBGA
21
23
6
5
Unit
pF
pF
pF
pF