EP3C40F484C6N Altera, EP3C40F484C6N Datasheet - Page 20
![IC CYCLONE III FPGA 40K 484FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP3C40F484C6N
Manufacturer Part Number
EP3C40F484C6N
Description
IC CYCLONE III FPGA 40K 484FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
Specifications of EP3C40F484C6N
Number Of Logic Elements/cells
39600
Number Of Labs/clbs
2475
Total Ram Bits
1161216
Number Of I /o
331
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2490
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C40F484C6N
Manufacturer:
ALTERA
Quantity:
1 400
Company:
Part Number:
EP3C40F484C6N
Manufacturer:
ALTERA44
Quantity:
377
Part Number:
EP3C40F484C6N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
1–20
Table 1–27. Cyclone III Devices Emulated RSDS_E_1R Transmitter Timing Specifications
Table 1–28. Cyclone III Devices Mini-LVDS Transmitter Timing Specifications
Cyclone III Device Handbook, Volume 2
t
t
t
Notes to
(1) Emulated RSDS_E_1R transmitter is supported at the output pin of all I/O banks.
(2) t
f
clock
frequency)
Device
operation in
Mbps
t
TCCS
Output jitter
(peak to
peak)
t
t
t
Notes to
(1) Applicable for true and emulated mini-LVDS transmitter.
(2) True mini-LVDS transmitter is only supported at the output pin of Row I/O (Banks 1, 2, 5, and 6). Emulated mini-LVDS transmitter is supported
(3) t
RISE
FALL
LOCK
HSC LK
DUTY
RISE
FALL
LOCK
Symbol
Symbol
(2)
(3)
at the output pin of all I/O banks.
LOC K
LOC K
(input
Table
Table
is the time required for the PLL to lock from the end of device configuration.
is the time required for the PLL to lock from the end of device configuration.
1–27:
1–28:
20 – 80%,
C
20 – 80%,
C
20 – 80%,
C
20 – 80%,
C
LOAD
LOAD
LOAD
LOAD
Modes
= 5 pF
= 5 pF
Modes
= 5 pF
= 5 pF
—
×10
×10
×8
×7
×4
×2
×1
×8
×7
×4
×2
×1
—
—
—
—
Min
—
—
—
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
—
—
—
—
—
500
500
Typ
C6
—
C6
Typ
500
500
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max
Max
200
200
200
200
200
400
400
400
400
400
400
400
200
500
55
—
—
—
—
1
1
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
—
—
—
—
—
Min
—
—
—
C7, I7
C7, I7
500
500
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
500
500
Typ
—
155.5
155.5
155.5
155.5
155.5
(Note 1)
Max
311
311
311
311
311
311
311
200
500
55
—
—
1
Max
—
—
1
,
(2)
Min
Chapter 1: Cyclone III Device Data Sheet
100
10
10
10
10
10
10
80
70
40
20
10
45
—
—
—
—
—
(Note 1)
Min
—
—
—
© January 2010 Altera Corporation
C8, A7
C8, A7
500
500
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
500
500
Typ
—
(Part 2 of 2)
Switching Characteristics
155.5
155.5
155.5
155.5
155.5
Max
311
311
311
311
311
311
311
200
550
Max
55
—
—
1
—
—
1
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
MHz
MHz
MHz
MHz
MHz
MHz
Unit
Unit
ms
ms
ps
ps
ps
ps
ps
ps
%