EP3C40F484C6N Altera, EP3C40F484C6N Datasheet - Page 13
![IC CYCLONE III FPGA 40K 484FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP3C40F484C6N
Manufacturer Part Number
EP3C40F484C6N
Description
IC CYCLONE III FPGA 40K 484FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
Specifications of EP3C40F484C6N
Number Of Logic Elements/cells
39600
Number Of Labs/clbs
2475
Total Ram Bits
1161216
Number Of I /o
331
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2490
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C40F484C6N
Manufacturer:
ALTERA
Quantity:
1 400
Company:
Part Number:
EP3C40F484C6N
Manufacturer:
ALTERA44
Quantity:
377
Part Number:
EP3C40F484C6N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 1: Cyclone III Device Family Overview
Chapter Revision History
Chapter Revision History
Table 1–7. Chapter Revision History
© December 2009 Altera Corporation
December 2009
July 2009
June 2009
October 2008
May 2008
July 2007
March 2007
Date
Table 1–7
Version
2.2
2.1
2.0
1.3
1.2
1.1
1.0
lists the revision history for this chapter.
Minor text edits.
Minor edit to the hyperlinks.
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Initial release.
Added Table 1–5.
Updated Table 1–1, Table 1–2, Table 1–3, and Table 1–4.
Updated “Introduction”, “Cyclone III Device Family Architecture”, “Embedded
Multipliers and Digital Signal Processing Support ”, “Clock Networks and
PLLs ”, “I/O Features ”, “High-Speed Differential Interfaces ”, “Auto-
Calibrating External Memory Interfaces ”, “Quartus II Software Support”,
“Configuration ”, and “Design Security (Cyclone III LS Devices Only)”.
Removed “Referenced Document” section.
Updated “Increased System Integration” section.
Updated “Memory Blocks” section.
Updated chapter to new template.
Added 164-pin Micro FineLine Ball-Grid Array (MBGA) details to Table 1–2,
Table 1–3 and Table 1–4.
Updated Figure 1–2 with automotive temperature information.
Updated “Increased System Integration” section, Table 1–6, and “High-Speed
Differential Interfaces” section with BLVDS information.
Removed the text “Spansion” in “Increased System.
Integration” and “Configuration” sections.
Removed trademark symbol from “MultiTrack” in “MultiTrack Interconnect”.
Removed registered trademark symbol from “Simulink” and “MATLAB” from
“Embedded Multipliers and Digital.
Signal Processing Support” section.
Added chapter TOC and “Referenced Documents” section.
Changes Made
Cyclone III Device Handbook, Volume 1
1–13