EPF10K50SQC240-3 Altera, EPF10K50SQC240-3 Datasheet - Page 97
![IC FLEX 10KE FPGA 50K 240-PQFP](/photos/6/72/67260/544-240-pqfp_sml.jpg)
EPF10K50SQC240-3
Manufacturer Part Number
EPF10K50SQC240-3
Description
IC FLEX 10KE FPGA 50K 240-PQFP
Manufacturer
Altera
Series
FLEX-10KE®r
Datasheet
1.EPF10K30ETC144-3.pdf
(100 pages)
Specifications of EPF10K50SQC240-3
Number Of Logic Elements/cells
2880
Number Of Labs/clbs
360
Total Ram Bits
40960
Number Of I /o
189
Number Of Gates
199000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-MQFP, 240-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-2241
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPF10K50SQC240-3
Manufacturer:
ALTERA
Quantity:
12 388
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
During initialization, which occurs immediately after configuration, the
device resets registers, enables I/O pins, and begins to operate as a logic
device. The I/O pins are tri-stated during power-up, and before and
during configuration. Together, the configuration and initialization
processes are called command mode; normal device operation is called user
mode.
SRAM configuration elements allow FLEX 10KE devices to be
reconfigured in-circuit by loading new configuration data into the device.
Real-time reconfiguration is performed by forcing the device into
command mode with a device pin, loading different configuration data,
reinitializing the device, and resuming user-mode operation. The entire
reconfiguration process requires less than 85 ms and can be used to
reconfigure an entire system dynamically. In-field upgrades can be
performed by distributing new configuration files.
Before and during configuration, all I/O pins (except dedicated inputs,
clock, or configuration pins) are pulled high by a weak pull-up resistor.
Programming Files
Despite being function- and pin-compatible, FLEX 10KE devices are not
programming- or configuration file-compatible with FLEX 10K or
FLEX 10KA devices. A design therefore must be recompiled before it is
transferred from a FLEX 10K or FLEX 10KA device to an equivalent
FLEX 10KE device. This recompilation should be performed both to create
a new programming or configuration file and to check design timing in
FLEX 10KE devices, which has different timing characteristics than
FLEX 10K or FLEX 10KA devices.
FLEX 10KE devices are generally pin-compatible with equivalent
FLEX 10KA devices. In some cases, FLEX 10KE devices have fewer I/O
pins than the equivalent FLEX 10KA devices.
Table 81
shows which
FLEX 10KE devices have fewer I/O pins than equivalent FLEX 10KA
devices. However, power, ground, JTAG, and configuration pins are the
same on FLEX 10KA and FLEX 10KE devices, enabling migration from a
FLEX 10KA design to a FLEX 10KE design.
Altera Corporation
97