EP1S20F484C7N Altera, EP1S20F484C7N Datasheet - Page 188

IC STRATIX FPGA 20K LE 484-FBGA

EP1S20F484C7N

Manufacturer Part Number
EP1S20F484C7N
Description
IC STRATIX FPGA 20K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S20F484C7N

Number Of Logic Elements/cells
18460
Number Of Labs/clbs
1846
Total Ram Bits
1669248
Number Of I /o
361
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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0
Power Consumption
4–18
Stratix Device Handbook, Volume 1
device. Decoupling capacitors were not used in this measurement. To
factor in the current for decoupling capacitors, sum up the current for
each capacitor using the following equation:
I = C (dV/dt)
If the regulator or power supply minimum output current is more than
the Stratix device requires, then the device may consume more current
than the maximum current listed in
not require any more current to successfully power up than what is listed
in
The exact amount of current consumed varies according to the process,
temperature, and power ramp rate. Stratix devices typically require less
current during power up than shown in
current during device operation is generally higher than the power-up
current.
The duration of the I
voltage supply rise time. The power-up current consumption drops when
the V
Note to
(1)
Table 4–34. Stratix Power-Up Current (I
Table
The maximum test conditions are for 0° C and typical test conditions are for
40° C.
EP1S10
EP1S20
EP1S25
EP1S30
EP1S40
EP1S60
EP1S80
CCINT
Device
Table
4–34.
supply reaches approximately 0.75 V.
4–34:
CCINT
Typical
Power-Up Current Requirement
power-up requirement depends on the V
1,000
250
400
500
550
650
800
Table
CCINT
Table
4–34. However, the device does
) Requirements
4–34. The user-mode
Maximum
1,200
1,500
1,900
2,300
2,600
3,000
700
Altera Corporation
Note (1)
January 2006
Unit
mA
mA
mA
mA
mA
mA
mA
CCINT

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