EP2AGX65DF29I5N Altera, EP2AGX65DF29I5N Datasheet - Page 86
EP2AGX65DF29I5N
Manufacturer Part Number
EP2AGX65DF29I5N
Description
IC ARRIA II GX FPGA 65K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX65DF29I5N
Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5246
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2AGX65DF29I5N
Manufacturer:
ALTERA31
Quantity:
199
Part Number:
EP2AGX65DF29I5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
1–78
Glossary
Table 1–67. Glossary (Part 1 of 4)
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
Letter
A,
B,
C,
E,
D
F
Differential I/O
Standards
f
f
f
HSCLK
HSDR
HSDRDPA
Subject
Table 1–67
Receiver Input Waveforms
Transmitter Output Waveforms
Left/Right PLL input clock frequency.
High-speed I/O block: Maximum/minimum LVDS data transfer rate
(f
High-speed I/O block: Maximum/minimum LVDS data transfer rate
(f
HSDR
HSDRDPA
= 1/TUI), non-DPA.
Single-Ended Waveform
Differential Waveform
Single-Ended Waveform
Differential Waveform
= 1/TUI), DPA.
lists the glossary for this chapter.
V
V
CM
CM
V
V
OD
ID
V
V
OD
ID
Definitions
Chapter 1: Device Datasheet for Arria II Devices
V
V
OD
ID
p − n = 0 V
December 2010 Altera Corporation
p − n = 0 V
Positive Channel (p) = V
Negative Channel (n) = V
Ground
Positive Channel (p) = V
Negative Channel (n) = V
Ground
OH
IH
OL
IL
Glossary