EP20K400EBI652-2X Altera, EP20K400EBI652-2X Datasheet - Page 21
EP20K400EBI652-2X
Manufacturer Part Number
EP20K400EBI652-2X
Description
IC APEX 20KE FPGA 400K 652-BGA
Manufacturer
Altera
Series
APEX-20K®r
Datasheet
1.EP20K30ETC144-3.pdf
(117 pages)
Specifications of EP20K400EBI652-2X
Number Of Logic Elements/cells
16640
Number Of Labs/clbs
1664
Total Ram Bits
212992
Number Of I /o
488
Number Of Gates
1052000
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
652-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Figure 9. APEX 20K Interconnect Structure
Column
Interconnect
I/O
I/O
I/O
Row
Interconnect
MegaLAB
MegaLAB
MegaLAB
I/O
I/O
A row line can be driven directly by LEs, IOEs, or ESBs in that row.
Further, a column line can drive a row line, allowing an LE, IOE, or ESB to
drive elements in a different row via the column and row interconnect.
The row interconnect drives the MegaLAB interconnect to drive LEs,
IOEs, or ESBs in a particular MegaLAB structure.
A column line can be directly driven by LEs, IOEs, or ESBs in that column.
A column line on a device’s left or right edge can also be driven by row
IOEs. The column line is used to route signals from one row to another. A
column line can drive a row line; it can also drive the MegaLAB
interconnect directly, allowing faster connections between rows.
Figure 10
interconnect to drive LEs within MegaLAB structures.
MegaLAB
MegaLAB
MegaLAB
shows how the FastTrack Interconnect uses the local
I/O
I/O
APEX 20K Programmable Logic Device Family Data Sheet
MegaLAB
MegaLAB
MegaLAB
I/O
I/O
MegaLAB
MegaLAB
MegaLAB
I/O
I/O
I/O
I/O
I/O
Column
Interconnect
21
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