EP2AGX95EF29I5N Altera, EP2AGX95EF29I5N Datasheet - Page 21
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EP2AGX95EF29I5N
Manufacturer Part Number
EP2AGX95EF29I5N
Description
IC ARRIA II GX FPGA 95K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX95EF29I5N.pdf
(306 pages)
Specifications of EP2AGX95EF29I5N
Number Of Logic Elements/cells
89178
Number Of Labs/clbs
3747
Total Ram Bits
6679
Number Of I /o
372
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
93674
# I/os (max)
372
Frequency (max)
500MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
93674
Ram Bits
7025459.2
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Chapter 1: Device Datasheet for Arria II Devices
Electrical Characteristics
Table 1–17. Pin Capacitance for Arria II GZ Devices
Table 1–18. Internal Weak Pull-up and Weak Pull-Down Resistors for Arria II GX Devices
December 2010 Altera Corporation
C
C
C
C
C
C
and C
Symbol
R
R
Notes to
(1) All I/O pins have an option to enable weak pull-up except configuration, test, and JTAG pins. The weak pull-down feature is only available for
(2) Pin pull-up resistance values may be lower if an external source drives the pin higher than V
IOTB
IOLR
CLKTB
CLKLR
OUTFB
CLK1
PU
PD
JTAG TCK.
, C
CLK10
Symbol
CLK3
Table
, C
Description
Value of I/O pin pull-up resistor
before and during configuration,
as well as user mode if the
programmable pull-up resistor
option is enabled.
Value of TCK pin pull-down
resistor
1–18:
CLK8
,
Table 1–17
Internal Weak Pull-Up and Weak Pull-Down Resistors
Table 1–18
devices.
Input capacitance on the top and bottom I/O pins
Input capacitance on the left and right I/O pins
Input capacitance on the top and bottom non-dedicated clock input pins
Input capacitance on the left and right non-dedicated clock input pins
Input capacitance on the dual-purpose clock output and feedback pins
Input capacitance for dedicated clock input pins
lists the pin capacitance for Arria II GZ devices.
lists the weak pull-up and pull-down resistor values for Arria II GX
V
V
V
V
V
V
V
V
V
V
V
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
= 3.3 V ±5%
= 3.0 V ±5%
= 2.5 V ±5%
= 1.8 V ±5%
= 1.5 V ±5%
= 1.2 V ±5%
= 3.3 V ±5%
= 3.0 V ±5%
= 2.5 V ±5%
= 1.8 V ±5%
= 1.5 V ±5%
Conditions
Description
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
(2)
(2)
(2)
(2)
(2)
(2)
Min
10
13
19
7
7
8
6
6
6
7
8
CCIO
.
143
Typ
25
28
35
57
82
19
22
25
35
50
(Note 1)
Typical
Max
108
163
351
112
41
47
61
29
32
42
70
4
4
4
4
5
2
Unit
Unit
pF
pF
pF
pF
pF
pF
k
k
k
k
k
k
k
k
k
k
k
1–13