EP1SGX40DF1020C5N Altera, EP1SGX40DF1020C5N Datasheet - Page 113
EP1SGX40DF1020C5N
Manufacturer Part Number
EP1SGX40DF1020C5N
Description
IC STRATIX GX FPGA 40K 1020-FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet
1.EP1SGX10CF672C7N.pdf
(272 pages)
Specifications of EP1SGX40DF1020C5N
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
624
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Altera Corporation
February 2005
the capabilities for dynamic and mixed sign multiplications are handled
differently. The following list provides the largest functions that can fit
into a single DSP block.
■
■
■
■
■
■
■
■
■
■
1
Figure 4–28
36
36
35
36
36
35
35
36
35
each operand are different
36
is used for both operands
×
×
×
×
×
×
×
×
×
×
36-bit unsigned by unsigned multiplication
36-bit signed by signed multiplication
36-bit unsigned by signed multiplication
35-bit signed by unsigned multiplication
35-bit signed by dynamic sign multiplication
36-bit dynamic sign by signed multiplication
36-bit unsigned by dynamic sign multiplication
35-bit dynamic sign by unsigned multiplication
35-bit dynamic sign multiplication when the sign controls for
36-bit dynamic sign multiplication when the same sign control
This list only shows functions that can fit into a single DSP block.
Multiple DSP blocks can support larger multiplication
functions.
shows one of the columns with surrounding LAB rows.
Stratix GX Device Handbook, Volume 1
Stratix GX Architecture
4–47
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