EP2S180F1020C5 Altera, EP2S180F1020C5 Datasheet - Page 147

• Manufacturer Part Number: EP2S180F1020C5
• Description: IC STRATIX II FPGA 180K 1020-FBG
• Manufacturer: Altera
• Series: Stratix® IIr

Specifications of EP2S180F1020C5

• Number Of Logic Elements/cells: 179400
• Number Of Labs/clbs: 8970
• Total Ram Bits: 9383040
• Number Of I /o: 742
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1020-FBGA
• Family Name: Stratix II
• Number Of Logic Blocks/elements: 179400
• # I/os (max): 742
• Frequency (max): 609.76MHz
• Process Technology: 90nm (CMOS)
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 179400
• Ram Bits: 9383040
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1020
• Package Type: FC-FBGA
• For Use With: 544-1701 - DSP PRO KIT W/SII EP2S180N
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-1463

Altera Corporation
April 2011
Note to
(1)
V
V
V
V
V
V
V
V
V
V
V
(DC)
V
V
(AC)
V
ΔV
V
(AC)
Symbol
Symbol
Table 5–17. SSTL-18 Class II Specifications
Table 5–18. SSTL-18 Class I & II Differential Specifications
CCIO
REF
TT
IH
IL
IH
IL
OH
OL
CCIO
SWING
X
SWING
ISO
OX
ISO
(AC) AC differential input cross
(DC) Low-level DC input voltage
(AC) Low-level AC input voltage
(DC) High-level DC input voltage
(AC) High-level AC input voltage
This specification is supported across all the programmable drive settings available for this I/O standard as shown
in the Stratix II Architecture chapter in volume 1 of the Stratix II Device Handbook.
Table
Output supply voltage
DC differential input voltage
point voltage
AC differential input voltage
Input clock signal offset
voltage
Input clock signal offset
voltage variation
AC differential cross point
voltage
Output supply voltage
Reference voltage
Termination voltage
High-level output voltage
Low-level output voltage
5–17:
Parameter
Parameter
Conditions
I
I
OH
OL
= 13.4 mA
= –13.4 mA
Conditions
(V
(V
(1)
CCIO
CCIO
(1)
Minimum
/2) – 0.175
/2) – 0.125
1.71
0.25
0.5
V
V
V
V
Minimum
REF
CCIO
REF
REF
0.855
1.71
+ 0.125
– 0.04
+ 0.25
– 0.28
Stratix II Device Handbook, Volume 1
0.5 × V
Typical
±200
1.80
DC & Switching Characteristics
CCIO
Typical
0.900
V
1.80
REF
(V
(V
CCIO
CCIO
Maximum
V
V
V
Maximum
/2) + 0.175
/2) + 0.125
REF
1.89
REF
REF
0.945
1.89
0.28
– 0.125
+ 0.04
– 0.25
5–11
Unit
Unit
mV
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V