EP2S130F1020C3 Altera, EP2S130F1020C3 Datasheet - Page 154
EP2S130F1020C3
Manufacturer Part Number
EP2S130F1020C3
Description
IC STRATIX II FPGA 130K 1020FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet
1.EP2S15F484I4N.pdf
(238 pages)
Specifications of EP2S130F1020C3
Number Of Logic Elements/cells
132540
Number Of Labs/clbs
6627
Total Ram Bits
6747840
Number Of I /o
742
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Family Name
Stratix II
Number Of Logic Blocks/elements
132540
# I/os (max)
742
Frequency (max)
778.82MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
132540
Ram Bits
6747840
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2158
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2S130F1020C3N
Manufacturer:
ALTERA
Quantity:
238
Part Number:
EP2S130F1020C3N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Operating Conditions
5–18
Stratix II Device Handbook, Volume 1
Notes for
(1)
(2)
50-Ω R
3.3/2.5
50-Ω R
2.5
25-Ω R
1.8
50-Ω R
1.8
50-Ω R
1.8
50−Ω R
1.5
50-Ω R
1.5
50−Ω R
1.2
50-Ω R
1.2
Table 5–30. Series On-Chip Termination Specification for Top & Bottom I/O Banks (Part 2 of 2)
Notes (1)
Symbol
The resistance tolerances for calibrated SOCT and POCT are for the moment of calibration. If the temperature or
voltage changes over time, the tolerance may also change.
On-chip parallel termination with calibration is only supported for input pins.
S
T
S
S
T
T
T
S
S
Table
,
2
Internal series termination with
calibration (50-Ω setting)
Internal series termination without
calibration (50-Ω setting)
Internal parallel termination with
calibration (50-Ω setting)
Internal series termination with
calibration (25-Ω setting)
Internal series termination without
calibration (25-Ω setting)
Internal series termination with
calibration (50-Ω setting)
Internal series termination without
calibration (50-Ω setting)
Internal parallel termination with
calibration (50-Ω setting)
Internal series termination with
calibration (50-Ω setting)
Internal series termination without
calibration (50-Ω setting)
Internal parallel termination with
calibration (50-Ω setting)
Internal series termination with
calibration (50-Ω setting)
Internal series termination without
calibration (50-Ω setting)
Internal parallel termination with
calibration (50-Ω setting)
5–30:
Description
V
V
V
V
V
V
V
V
V
V
V
V
V
V
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
C C I O
Conditions
= 3.3/2.5 V
= 3.3/2.5 V
= 1.8 V
= 1.8 V
= 1.8 V
= 1.8 V
= 1.8 V
= 1.8 V
= 1.5 V
= 1.5 V
= 1.5 V
= 1.2 V
= 1.2 V
= 1.2 V
Commercial
Max
±30
±30
±30
±30
±10
±36
±10
±50
±10
±5
±5
±5
±8
±8
Resistance Tolerance
Industrial
Altera Corporation
Max
±10
±30
±30
±10
±30
±10
±30
±15
±10
±36
±15
±10
±50
±15
April 2011
Unit
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