XC2V40-6FGG256C Xilinx Inc, XC2V40-6FGG256C Datasheet - Page 63
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XC2V40-6FGG256C
Manufacturer Part Number
XC2V40-6FGG256C
Description
IC FPGA VIRTEX-II 40K 256-FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-IIr
Datasheet
1.XC2V250-4FGG256C.pdf
(318 pages)
Specifications of XC2V40-6FGG256C
Number Of Labs/clbs
64
Total Ram Bits
73728
Number Of I /o
88
Number Of Gates
40000
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-
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Table 17: IOB Output Switching Characteristics Standard Adjustments (Continued)
DS031-3 (v3.5) November 5, 2007
Product Specification
LVCMOS, 2.5V, Fast, 16 mA
LVCMOS, 2.5V, Fast, 24 mA
LVCMOS, 1.8V, Slow, 2 mA
LVCMOS, 1.8V, Slow, 4 mA
LVCMOS, 1.8V, Slow, 6 mA
LVCMOS, 1.8V, Slow, 8 mA
LVCMOS, 1.8V, Slow, 12 mA
LVCMOS, 1.8V, Slow, 16 mA
LVCMOS, 1.8V, Fast, 2 mA
LVCMOS, 1.8V, Fast, 4 mA
LVCMOS, 1.8V, Fast, 6 mA
LVCMOS, 1.8V, Fast, 8 mA
LVCMOS, 1.8V, Fast, 12 mA
LVCMOS, 1.8V, Fast, 16 mA
LVCMOS, 1.5V, Slow, 2 mA
LVCMOS, 1.5V, Slow, 4 mA
LVCMOS, 1.5V, Slow, 6 mA
LVCMOS, 1.5V, Slow, 8 mA
LVCMOS, 1.5V, Slow, 12 mA
LVCMOS, 1.5V, Slow, 16 mA
LVCMOS, 1.5V, Fast, 2 mA
LVCMOS, 1.5V, Fast, 4 mA
LVCMOS, 1.5V, Fast, 6 mA
LVCMOS, 1.5V, Fast, 8 mA
LVCMOS, 1.5V, Fast, 12 mA
LVCMOS, 1.5V, Fast, 16 mA
LVDS (Low-Voltage Differential Signaling), 2.5V
LVDS, 3.3V
LVDSEXT (LVDS Extended Mode), 2.5V
LVDSEXT, 3.3V
ULVDS (Ultra LVDS), 2.5V
BLVDS (Bus LVDS), 2.5V
LDT (HyperTransport), 2.5V
LVPECL (Low-Voltage Positive Electron-Coupled Logic), 3.3V
PCI (Peripheral Component Interface), 33 MHz, 3.3V
PCI, 66 MHz, 3.3V
PCI-X, 133 MHz, 3.3V
GTL (Gunning Transceiver Logic)
GTL Plus
HSTL (High-Speed Transceiver Logic), Class I
HSTL, Class II
HSTL, Class III
HSTL, Class IV
HSTL, Class I, 1.8V
R
Description
www.xilinx.com
LVCMOS18_S12
LVCMOS18_S16
LVCMOS15_S12
LVCMOS15_S16
LVCMOS25_F16
LVCMOS25_F24
LVCMOS18_F12
LVCMOS18_F16
LVCMOS15_F12
LVCMOS15_F16
IOSTANDARD
LVCMOS18_S2
LVCMOS18_S4
LVCMOS18_S6
LVCMOS18_S8
LVCMOS15_S2
LVCMOS15_S4
LVCMOS15_S6
LVCMOS15_S8
LVCMOS18_F2
LVCMOS18_F4
LVCMOS18_F6
LVCMOS18_F8
LVCMOS15_F2
LVCMOS15_F4
LVCMOS15_F6
LVCMOS15_F8
LVDSEXT_25
LVDSEXT_33
Virtex-II Platform FPGAs: DC and Switching Characteristics
LVPECL_33
HSTL_I_18
ULVDS_25
BLVDS_25
Attribute
LVDS_33
LVDS_25
HSTL_IV
HSTL_III
PCI33_3
PCI66_3
HSTL_II
LDT_25
HSTL_I
GTLP
PCIX
GTL
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
OLVCMOS18_S12
OLVCMOS18_S16
OLVCMOS15_S12
OLVCMOS15_S16
T
T
OLVCMOS25_F16
OLVCMOS25_F24
OLVCMOS18_F12
OLVCMOS18_F16
OLVCMOS15_F12
OLVCMOS15_F16
OLVCMOS18_S2
OLVCMOS18_S4
OLVCMOS18_S6
OLVCMOS18_S8
OLVCMOS18_F2
OLVCMOS18_F4
OLVCMOS18_F6
OLVCMOS18_F8
OLVCMOS15_S2
OLVCMOS15_S4
OLVCMOS15_S6
OLVCMOS15_S8
OLVCMOS15_F2
OLVCMOS15_F4
OLVCMOS15_F6
OLVCMOS15_F8
T
T
Parameter
T
T
OLVDSEXT_25
OLVDSEXT_33
T
T
T
OLVPECL_33
T
T
T
T
T
OHSTL_I_18
OULVDS_25
OBLVDS_25
T
Timing
OLVDS_25
OLVDS_33
T
OHSTL_III
OHSTL_IV
OPCI33_3
OPCI66_3
T
OHSTL_II
OLDT_25
T
OHSTL_I
OGTLP
OPCIX
OGTL
–0.18
–0.35
15.62
10.20
18.96
12.77
12.05
–0.31
–0.25
–0.18
–0.17
–0.20
–0.20
–0.01
–0.01
–0.31
–0.17
–0.15
–0.17
–0.40
7.52
6.87
5.54
5.31
5.55
1.89
0.83
0.70
0.26
0.23
9.75
9.04
8.21
5.09
2.01
1.46
0.93
0.74
0.67
0.67
0.29
1.15
0.26
0.03
-6
Speed Grade
–0.19
–0.36
16.10
10.51
19.55
13.17
12.42
10.06
–0.32
–0.26
–0.19
–0.18
–0.21
–0.21
–0.01
–0.01
–0.32
–0.18
–0.16
–0.17
–0.41
7.75
7.08
5.71
5.47
5.72
1.95
0.85
0.72
0.27
0.23
9.32
8.46
5.25
2.07
1.51
0.96
0.77
0.69
0.69
0.30
1.19
0.27
0.03
-5
–0.21
–0.40
17.71
11.57
21.50
14.48
13.66
11.06
10.25
–0.36
–0.29
–0.21
–0.19
–0.23
–0.23
–0.01
–0.01
–0.36
–0.20
–0.17
–0.19
–0.45
8.53
7.78
6.28
6.02
6.30
2.15
0.94
0.80
0.30
0.26
9.31
5.78
2.27
1.66
1.05
0.84
0.75
0.76
0.33
1.31
0.29
0.04
-4
Module 3 of 4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15
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