XC3S2000-4FGG676I Xilinx Inc, XC3S2000-4FGG676I Datasheet - Page 180
![SPARTAN-3A FPGA 2M STD 676-FBGA](/photos/6/73/67300/b-676_sml.jpg)
XC3S2000-4FGG676I
Manufacturer Part Number
XC3S2000-4FGG676I
Description
SPARTAN-3A FPGA 2M STD 676-FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3r
Datasheet
1.XC3S50-4VQG100C.pdf
(217 pages)
Specifications of XC3S2000-4FGG676I
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
5120
Total Ram Bits
737280
Number Of I /o
489
Number Of Gates
2000000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
676-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S2000-4FGG676I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Spartan-3 FPGA Family: Pinout Descriptions
180
FG676 Footprint
Left Half of Package
(top view)
XC3S1000
(391 max. user I/O)
XC3S1500
(487 max user I/O)
XC3S2000, XC3S4000,
XC3S5000
(489 max user I/O)
All devices
315
403
405
40
98
48
48
12
16
20
64
16
76
2
0
8
7
4
I/O: Unrestricted,
general-purpose user I/O
VREF: User I/O or input
voltage reference for bank
N.C.: Unconnected pins for
XC3S1000 ( )
I/O: Unrestricted,
general-purpose user I/O
VREF: User I/O or input
voltage reference for bank
N.C.: Unconnected pins for
XC3S1500 ( )
I/O: Unrestricted,
general-purpose user I/O
VREF: User I/O or input
voltage reference for bank
N.C.: No unconnected pins
DUAL: Configuration pin,
then possible user I/O
GCLK: User I/O or global
clock buffer input
DCI: User I/O or reference
resistor input for bank
CONFIG: Dedicated
configuration pins
JTAG: Dedicated JTAG
port pins
VCCINT: Internal core
voltage supply (+1.2V)
VCCO: Output voltage
supply for bank
VCCAUX: Auxiliary voltage
supply (+2.5V)
GND: Ground
Figure 49: FG676 Package Footprint (top view)
G
M
W
A
B
C
D
E
F
H
K
L
N
P
R
T
U
V
Y
A
A
A
B
A
C
A
D
A
E
A
F
J
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VREF_7
VREF_7
VREF_7
VREF_6
L03N_7
L06N_7
L09N_7
L14N_7
L19N_7
L26N_7
L29N_7
L34N_7
L40N_7
L40P_6
L34P_6
L29P_6
L26P_6
L19P_6
L10P_6
L09P_6
L05P_6
L03P_6
L01P_6
VRN_6
GND
GND
TD I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
www.xilinx.com
VCCAUX
HSWAP_
VCCAUX
VREF_6
VREF_6
L03P_7
L06P_7
L09P_7
L14P_7
L19P_7
L22N_7
L26P_7
L29P_7
L34P_7
L40P_7
L40N_6
L34N_6
L29N_6
L26N_6
L22P_6
L19N_6
L10N_6
VREF _6
L05N_6
L03N_6
L01N_6
L09N_6
VRP_6
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
2
EN
PROG_B
VCCO_7
VCCO_7
VCCO_6
VCCO_6
VREF_0
VREF_6
L02N_7
L07N_7
L17N_7
L22P_7
L24N_7
L33N_7
L39N_7
L39P_6
L33P_6
L24P_6
L22N_6
L17P_6
L07P_6
L02P_6
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M1
M0
M2
3
VREF_0
VREF_6
L05P_0
L05N_0
L02P_7
L07P_7
L08N_7
L17P_7
L21N_7
L24P_7
L33P_7
L39P_7
L39N_6
L33N_6
L24N_6
L21P_6
L17N_6
L08P_6
L07N_6
L02N_6
L04P_5
L04N_5
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
4
RDWR_B
VREF_7
VREF_5
L06P_0
L06N_0
L01P_0
L01N_0
L01N_7
L08P_7
L16P_7
L21P_7
L23N_7
L28N_7
L32P_7
L38N_7
L38P_6
L32P_6
L28P_6
L23P_6
L21N_6
L16P_6
L08N_6
L01P_5
L01N_5
L06P_5
L06N_5
VRN_0
VRP_0
VRP_7
CS_B
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
5
L08P_0
L08N_0
L07P_0
L07N_0
L01P_7
L05N_7
L10N_7
L16N_7
L23P_7
L28P_7
L32N_7
L38P_7
L38N_6
L32N_6
L28N_6
L23N_6
L16N_6
L14P_6
L06P_6
L05P_5
L05N_5
L07P_5
L07N_5
L08P_5
L08N_5
VRN_7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
6
VCCO_0
VCCO_5
VREF_0
L10P_0
L10N_0
L09P_0
L09N_0
L05P_7
VREF _7
L20P_7
L20N_7
L27N_7
L31N_7
L35N_7
L35P_6
L31P_6
L27P_6
L20P_6
L20N_6
L14N_6
L06N_6
L09P_5
L09N_5
L10P_5
L10N_5
L10P _7
VRN_5
VRP_5
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
7
Bank 0
VCCINT
VCCINT
VCCO_7
VCCO_7
VCCO_6
VCCO_6
VREF_7
L15P_0
L15N_0
L12P_0
L12N_0
L11P_0
L11N_0
L27P_7
L31P_7
L35P_7
L35N_6
L31N_6
L27N_6
L11P_5
VREF _5
L12P_5
L12N_5
L15P_5
L15N_5
L11N_5
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DS099-4 (v2.5) December 4, 2009
8
Bank 5
VCCAUX
VCCINT
VCCINT
VCCINT
VCCINT
VCCAUX
VCCO_0 VCCO_0
VCCO_7
VCCO_7
VCCO_7 VCCO_7
VCCO_6 VCCO_6
VCCO_6
VCCO_6
VCCO_5 VCCO_5
L18P_0
L18N_0
L17P_0
L17N_0
L16P_0
L16N_0
L16P_5
L16N_5
L18P_5
L18N_5
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
9
VCCINT
VCCINT
VCCINT
VCCINT
VREF_0
VREF_5
L23P_0
L23N_0
L22P_0
L22N_0
L19P_0
L19N_0
L19P_5
L19N_5
L22P_5
L22N_5
L23P_5
L23N_5
GND
Product Specification
GND
GND
GND
10
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCCO_0
VCCO_0 VCCO_0 VCCO_0
VCCO_5 VCCO_5 VCCO_5
VCCO_5
VREF _0
L26N_0
L25P_0
L25N_0
L24P_0
L24N_0
L24P_5
L24N_5
L25P_5
L25N_5
L26P_5
L26N_5
L26P _0
GND
GND
GND
GND
GND
GND
GND
GND
11
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DS099-4_12a_030203
VREF_5
VREF_5
L29P_0
L29N_0
L28P_0
L28N_0
L27N_0
L27P_5
L27N_5
L28P_5
L28N_5
L29P_5
L29N_5
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
12
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D7
D6
VREF_0
VCCO_0
VCCO_5
VREF_5
L32P_0
GCLK6
L32N_0
GCLK7
L31P_0
L31N_0
L30P_0
L30N_0
L27P_0
L30P_5
L30N_5
L31P_5
L31N_5
L32P_5
GCLK2
L32N_5
GCLK3
GND
GND
GND
GND
GND
GND
13
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D5
D4
R