XCV200E-7BG352I Xilinx Inc, XCV200E-7BG352I Datasheet - Page 78
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XCV200E-7BG352I
Manufacturer Part Number
XCV200E-7BG352I
Description
IC FPGA 1.8V I-TEMP 352-MBGA
Manufacturer
Xilinx Inc
Series
Virtex™-Er
Datasheet
1.XCV200E-6CS144C.pdf
(233 pages)
Specifications of XCV200E-7BG352I
Number Of Logic Elements/cells
5292
Number Of Labs/clbs
1176
Total Ram Bits
114688
Number Of I /o
260
Number Of Gates
306393
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
352-LBGA, Metal
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Virtex™-E 1.8 V Field Programmable Gate Arrays
Virtex-E Pin-to-Pin Output Parameter Guidelines
All devices are 100% functionally tested. Listed below are representative values for typical pin locations and normal clock
loading. Values are expressed in nanoseconds unless otherwise noted.
Global Clock Input to Output Delay for LVTTL, 12 mA, Fast Slew Rate, with DLL
Module 3 of 4
18
Notes:
1.
2.
3.
LVTTL Global Clock Input to Output Delay using
Output Flip-flop, 12 mA, Fast Slew Rate, with
DLL. For data output with different standards,
adjust the delays with the values shown in
Output Switching Characteristics Standard
Adjustments, page
Listed above are representative values where one global clock input drives one vertical clock line in each accessible column, and
where all accessible IOB and CLB flip-flops are clocked by the global clock net.
Output timing is measured at 50% V
Table 3
DLL output jitter is already included in the timing calculation.
and
Table
Description
4.
10.
(1)
CC
threshold with 35 pF external capacitive load. For other I/O standards and different loads, see
IOB
T
Symbol
ICKOFDLL
www.xilinx.com
1-800-255-7778
XCV1000E
XCV1600E
XCV2000E
XCV2600E
XCV3200E
XCV100E
XCV200E
XCV300E
XCV400E
XCV600E
XCV50E
Device
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Speed Grade
Production Product Specification
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
-8
DS022-3 (v2.9.2) March 14, 2003
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
-7
(2, 3)
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
-6
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R
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