XC5VLX30-3FFG676C Xilinx Inc, XC5VLX30-3FFG676C Datasheet - Page 196
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XC5VLX30-3FFG676C
Manufacturer Part Number
XC5VLX30-3FFG676C
Description
IC FPGA VIRTEX-5 30K 676FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX30-3FFG676C
Number Of Logic Elements/cells
30720
Number Of Labs/clbs
2400
Total Ram Bits
1179648
Number Of I /o
400
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Chapter 5: Configurable Logic Blocks (CLBs)
196
Designing Large Multiplexers
4:1 Multiplexer
Each LUT can be configured into a 4:1 MUX. The 4:1 MUX can be implemented with a flip-
flop in the same slice. Up to four 4:1 MUXes can be implemented in a slice, as shown in
Figure
X-Ref Target - Figure 5-21
SEL D [1:0], DATA D [3:0]
SEL C [1:0], DATA C [3:0]
SEL B [1:0], DATA B [3:0]
SEL A [1:0], DATA A [3:0]
5-21.
Input
Input
Input
Input
CLK
Figure 5-21: Four 4:1 Multiplexers in a Slice
www.xilinx.com
(D[6:1])
(C[6:1])
(B[6:1])
(A[6:1])
(CLK)
6
6
6
6
A[6:1]
A[6:1]
A[6:1]
A[6:1]
LUT
LUT
LUT
LUT
SLICE
O6
O6
O6
O6
(Optional)
(Optional)
(Optional)
(Optional)
D Q
D Q
D Q
D Q
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
(DQ)
(CQ)
(BQ)
(AQ)
(D)
(C)
(B)
(A)
4:1 MUX Output
Registered
Output
4:1 MUX Output
Registered
Output
4:1 MUX Output
Registered
Output
4:1 MUX Output
Registered
Output
UG190_5_21_050506
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