XC5VLX50T-1FFG1136C Xilinx Inc, XC5VLX50T-1FFG1136C Datasheet - Page 354

• Manufacturer Part Number: XC5VLX50T-1FFG1136C
• Description: IC FPGA VIRTEX-5 50K 1136FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXTr

Specifications of XC5VLX50T-1FFG1136C

• Total Ram Bits: 2211840
• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Number Of I /o: 480
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1136-BBGA, FCBGA
• No. Of Logic Blocks: 7200
• No. Of Gates: 50000
• Family Type: Virtex-5 LXT
• No. Of Speed Grades: 1
• No. Of I/o's: 480
• Clock Management: PLL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 122-1564

Chapter 8: Advanced SelectIO Logic Resources
354
ISERDES Primitive (ISERDES_NODELAY)
•
Figure 8-1
components and features of the block.
X-Ref Target - Figure 8-1
The ISERDES primitive in Virtex-5 devices (shown in
X-Ref Target - Figure 8-2
Dedicated support for Networking interfaces.
CLKDIV
OCLK
Bitslip
CE1
CE2
CLK
RST
D
shows the block diagram of the ISERDES, highlighting all the major
BITSLIP
CE1
CE2
CLK
CLKDIV
D
OCLK
SHIFTIN1
SHIFTIN2
RST
CLKB
Figure 8-2: ISERDES_NODELAY Primitive
Figure 8-1: ISERDES Block Diagram
www.xilinx.com
Module
CE
ISERDES_NODELAY
Primitive
Serial to Parallel
Converter
Figure
BITSLIP
Module
8-2) is ISERDES_NODELAY.
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
ug190_8_02_112607
Q1
Q2
Q3
Q4
Q5
Q6
SHIFTOUT1
SHIFTOUT2
ug190_8_01_050906
SHIFTIN1/2
SHIFTOUT1/2
Q1 - Q6