XC5VLX50-3FF324C Xilinx Inc, XC5VLX50-3FF324C Datasheet - Page 235
![IC FPGA VIRTEX-5 50K 324FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX50-3FF324C
Manufacturer Part Number
XC5VLX50-3FF324C
Description
IC FPGA VIRTEX-5 50K 324FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX50-3FF324C
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Total Ram Bits
1769472
Number Of I /o
220
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
324-BBGA, FCBGA
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-AFX-FF324-500-G - BOARD DEV VIRTEX 5 FF324HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VLX50-3FF324C
Manufacturer:
XilinxInc
Quantity:
3 000
- XC5VLX30-1FFG324C PDF datasheet
- XC5VLX30-1FFG324C PDF datasheet #2
- XC5VLX30-1FFG324C PDF datasheet #3
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- Download datasheet (14Mb)
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
IBUFDS_DIFF_OUT
OBUFDS
OBUFTDS
Figure 6-23
(OB). This primitive is for expert users only.
X-Ref Target - Figure 6-23
Figure 6-24
X-Ref Target - Figure 6-24
Figure 6-25
X-Ref Target - Figure 6-25
Figure 6-23: Differential Input Buffer Primitive (IBUFDS_DIFF_OUT)
Figure 6-25: Differential 3-state Output Buffer Primitive (OBUFTDS)
shows the differential input buffer primitive with a complementary output
shows the differential output buffer primitive.
shows the differential 3-state output buffer primitive.
Figure 6-24: Differential Output Buffer Primitive (OBUFDS)
from Device Pad
www.xilinx.com
Input from
Input
3-state Input
Input from
FPGA
I
I
FPGA
IBUFDS_DIFF_OUT
T
+
–
+
–
OBUFTDS
OBUFDS
IB
I
ug190_6_22_022806
OB
ug190_6_21_022806
O
OB
O
Output to
Device Pads
Virtex-5 FPGA SelectIO Primitives
OB
Output to
Device Pads
O
UG190_6_97_122208
Output
into FPGA
235
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