XC5VSX50T-1FFG1136C Xilinx Inc, XC5VSX50T-1FFG1136C Datasheet - Page 301

• Manufacturer Part Number: XC5VSX50T-1FFG1136C
• Description: IC FPGA VIRTEX-5 50K 1136FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 SXTr

Specifications of XC5VSX50T-1FFG1136C

• Total Ram Bits: 4866048
• Number Of Logic Elements/cells: 52224
• Number Of Labs/clbs: 4080
• Number Of I /o: 480
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1136-BBGA, FCBGA
• No. Of Logic Blocks: 4080
• No. Of Macrocells: 50000
• Family Type: Virtex-5
• No. Of Speed Grades: 1
• No. Of I/o's: 480
• Clock Management: DCM, PLL
• Core Supply: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML506-UNI-G - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1567

Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Table 6-39: I/O Compatibility (Continued)
Notes:
1. See
2. Differential inputs and inputs using V
3. N/R = no requirement.
4. RSDS_25 has the same DC specifications as LVDS_25. All information pertaining to LVDS_25
5. I/O standard is selected using the IOSTANDARD attribute.
HSTL_III
HSTL_IV
HSTL_I
HSTL_II
DIFF_HSTL_I
DIFF_HSTL_II
LVCMOS15
LVDCI_15
HSLVDCI_15
LVDCI_DV2_15
GTLP_DCI
HSTL_III_DCI
HSTL_IV_DCI
HSTL_I_DCI
HSTL_II_DCI
HSTL_II_T_DCI
DIFF_HSTL_I_DCI
DIFF_HSTL_II_DCI
GTL_DCI
GTLP
GTL
LVCMOS12
HSTL_I_12
must not exceed V
is applicable to RSDS_25.
I/O Standard
3.3V I/O Design Guidelines
CCO
, due to the presence of clamp diodes to V
www.xilinx.com
Output
N/R
1.5
1.2
1.2
for more detailed information
V
Rules for Combining I/O Standards in the Same Bank
CCO
REF
Note (2)
Note (2)
Input
are powered from V
1.5
1.2
1.2
V
Input
V
N/R
N/R
N/R
N/R
CCO
N/R
N/R
N/R
N/R
0.75
0.75
0.75
0.75
0.75
0.9
0.9
0.9
0.9
0.8
0.8
0.6
REF
1
1
/2
CCAUX
CCO
Output
Single
Single
Single
Series
Series
Series
Termination Type
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
Split
Split
.
. However, pin voltage
Single
Single
Single
Single
Input
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
N/R
Split
Split
Split
Split
Split
N/R
N/R
N/R
N/R
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