XC5VLX110T-1FF1738C Xilinx Inc, XC5VLX110T-1FF1738C Datasheet - Page 273
![IC FPGA VIRTEX-5 110K 1738FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX110T-1FF1738C
Manufacturer Part Number
XC5VLX110T-1FF1738C
Description
IC FPGA VIRTEX-5 110K 1738FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX110T-1FF1738C
Number Of Logic Elements/cells
110592
Number Of Labs/clbs
8640
Total Ram Bits
5455872
Number Of I /o
680
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1738-BBGA, FCBGA
For Use With
HW-V5-ML523-FXT-UNI-G-J - BOARD EVAL FOR VIRTEX-5HW-V5-ML523-FXT-UNI-G - BOARD EVAL FOR VIRTEX-5HW-V5-ML523-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-AFX-FF1738-500-G - BOARD DEV VIRTEX 5 FF1738
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VLX110T-1FF1738C
Manufacturer:
Xilinx Inc
Quantity:
10 000
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X-Ref Target - Figure 6-65
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
DCI
HSTL_II_T_DCI_18 (1.8V) Split-Thevenin Termination
HSTL_II_T_DCI_18
Table 6-26
Table 6-26: HSTL Class IV (1.8V) DC Voltage Specifications
Figure 6-65
HSTL_II_T_DCI_18 (1.8V) with on-chip split-thevenin termination. In this bidirectional
case, when 3-stated, the termination is invoked on the receiver and not on the driver.
Notes:
1. V
2. Per EIA/JESD8-6, “The value of V
Figure 6-65: HSTL_II_T_DCI_18 Split-Thevenin Termination
V
V
V
V
V
V
V
I
I
OH
OL
CCO
REF
TT
IH
IL
OH
OL
Not 3-stated
the use conditions specified by the user.”
V
OL
at V
at V
REF
(2)
and V
OL
= 0.9V
OH
lists the HSTL Class IV (1.8V) DC voltage specifications.
(mA)
shows a sample circuit illustrating a valid termination technique for
IOB
OH
(mA)
for lower drive currents are sample tested.
(1)
(1)
Z 0
www.xilinx.com
REF
is to be selected by the user to provide optimum noise margin in
3-stated
IOB
V
Specific Guidelines for I/O Supported Standards
CCO
V
2R
2R
V
= 1.8V
CCO
REF
VRP
VRN
Min
1.7
–8
48
–
–
–
–
+ 0.1
– 0.4
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
V
REF
= 0.9V
HSTL_II_T_DCI_18
V
Typ
1.8
1.1
CCO
–
–
–
–
–
–
+
–
ug190_6_91_041206
V
REF
Max
1.9
0.4
–
–
–
–
–
–
– 0.1
273
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