XC2V4000-6FFG1152C Xilinx Inc, XC2V4000-6FFG1152C Datasheet - Page 28
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XC2V4000-6FFG1152C
Manufacturer Part Number
XC2V4000-6FFG1152C
Description
IC FPGA VIRTEX-II 4M 1152-FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-IIr
Datasheet
1.XC2V250-4FGG256C.pdf
(318 pages)
Specifications of XC2V4000-6FFG1152C
Number Of Labs/clbs
5760
Total Ram Bits
2211840
Number Of I /o
824
Number Of Gates
4000000
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-
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3-State Buffers
Introduction
Each Virtex-II CLB contains two 3-state drivers (TBUFs)
that can drive on-chip busses. Each 3-state buffer has its
own 3-state control pin and its own input pin.
Each of the four slices have access to the two 3-state buff-
ers through the switch matrix, as shown in
TBUFs in neighboring CLBs can access slice outputs by
direct connects. The outputs of the 3-state buffers drive hor-
izontal routing resources used to implement 3-state busses.
The 3-state buffer logic is implemented using AND-OR logic
rather than 3-state drivers, so that timing is more predict-
able and less load dependant especially with larger devices.
CLB/Slice Configurations
Table 12
implemented in one of the configurations listed.
Table 12: Logic Resources in One CLB
DS031-2 (v3.5) November 5, 2007
Product Specification
Slices
4
summarizes the logic resources in one CLB. All of the CLBs are identical and each CLB or slice can be
Figure 27: Virtex-II 3-State Buffers
R
Switch
Matrix
LUTs
8
Flip-Flops
Slice
Slice
TBUF
TBUF
S1
S0
Figure 28: 3-State Buffer Connection to Horizontal Lines
8
Switch
CLB-II
matrix
DS031_37_060700
Slice
Slice
S3
S2
MULT_ANDs
8
Table 13
Figure
Programmable
connection
www.xilinx.com
27.
shows the available resources in all CLBs.
Carry-Chains
Arithmetic &
Locations / Organization
Four horizontal routing resources per CLB are provided for
on-chip 3-state busses. Each 3-state buffer has access
alternately to two horizontal lines, which can be partitioned
as shown in
to SelectRAM memory and multiplier or I/O blocks are
skipped.
Number of 3-State Buffers
Table 11
each Virtex-II device. The number of 3-state buffers is twice
the number of CLB elements.
Table 11: Virtex-II 3-State Buffers
2
XC2V40
XC2V80
XC2V250
XC2V500
XC2V1000
XC2V1500
XC2V2000
XC2V3000
XC2V4000
XC2V6000
XC2V8000
Switch
matrix
CLB-II
Device
Virtex-II Platform FPGAs: Functional Description
shows the number of 3-state buffers available in
Chains
Figure
SOP
2
3-State Buffers
28. The switch matrices corresponding
Distributed
SelectRAM
per Row
128 bits
3 - state lines
DS031_09_032700
112
144
176
208
16
16
32
48
64
80
96
Registers
of 3-State Buffers
128 bits
Shift
Total Number
11,520
16,896
23,296
1,536
2,560
3,840
5,376
7,168
128
256
768
Module 2 of 4
TBUF
2
20
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