XC3190A-3PQ160C Xilinx Inc, XC3190A-3PQ160C Datasheet - Page 3
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XC3190A-3PQ160C
Manufacturer Part Number
XC3190A-3PQ160C
Description
IC LOGIC CL ARRAY 9000GAT 160PQF
Manufacturer
Xilinx Inc
Series
XC3000A/Lr
Datasheet
1.XC3190A-3PC84C.pdf
(76 pages)
Specifications of XC3190A-3PQ160C
Number Of Labs/clbs
320
Total Ram Bits
64160
Number Of I /o
138
Number Of Gates
6000
Voltage - Supply
4.25 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
160-BQFP
Dc
9929
Case
QFP160
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Logic Elements/cells
-
Other names
122-1047
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3190A-3PQ160C
Manufacturer:
XILINX
Quantity:
455
Part Number:
XC3190A-3PQ160C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Product Obsolete or Under Obsolescence
R
XC3000 Series Field Programmable Gate Arrays
Improvements in the XC3000A and XC3000L
Families
n a li t y
F u n c t io
The XC3000A and XC3000L families offer the following
enhancements over the popular XC3000 family:
0 A
X C 3 1 0
The XC3000A and XC3000L families have additional inter-
0 L
X C 3 1 0
0
X C 3 1 0
connect resources to drive the I-inputs of TBUFs driving
horizontal Longlines. The CLB Clock Enable input can be
0 A
X C 3 0 0
driven from a second vertical Longline. These two additions
0 L
X C 3 0 0
result in more efficient and faster designs when horizontal
S p e e d
Longlines are used for data bussing.
During configuration, the XC3000A and XC3000L devices
check the bit-stream format for stop bits in the appropriate
positions. Any error terminates the configuration and pulls
INIT Low.
When the configuration process is finished and the device
starts up in user mode, the first activation of the outputs is
automatically slew-rate limited. This feature, called Soft
c i t y
C a p a
G a t e
Startup, avoids the potential ground bounce when all
out-puts are turned on simultaneously. After start-up, the
X7068
slew rate of the individual outputs is, as in the XC3000 fam-
ily, determined by the individual configuration option.
Figure 1: XC3000 FPGA Families
Improvements in the XC3100A and XC3100L
Families
7
Based on a more advanced CMOS process, the XC3100A
and XC3100L families are architecturally-identical, perfor-
mance-optimized relatives of the XC3000A and XC3000L
families. While all families are footprint compatible, the
XC3100A family extends achievable system performance
beyond 85 MHz.
November 9, 1998 (Version 3.1)
7-5