XC4044XL-2BG432I Xilinx Inc, XC4044XL-2BG432I Datasheet - Page 54
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XC4044XL-2BG432I
Manufacturer Part Number
XC4044XL-2BG432I
Description
IC FPGA I-TEMP 3.3V 2SPD 432MBGA
Manufacturer
Xilinx Inc
Series
XC4000E/Xr
Datasheet
1.XC4005E-4PC84C.pdf
(68 pages)
Specifications of XC4044XL-2BG432I
Number Of Logic Elements/cells
3800
Number Of Labs/clbs
1600
Total Ram Bits
51200
Number Of I /o
320
Number Of Gates
44000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
432-LBGA, Metal
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
XC4000E and XC4000X Series Field Programmable Gate Arrays
Table 22: Pin Functions During Configuration
6-58
PROGRAM (I)
M2(HIGH) (I)
M1(HIGH) (I)
M0(HIGH) (I)
HDC (HIGH)
LDC (LOW)
CCLK (I)
SERIAL
<1:1:1>
SLAVE
DONE
DIN (I)
DOUT
TMS
TDO
TCK
INIT
TDI
PROGRAM (I)
HDC (HIGH)
M2(LOW) (I)
M1(LOW) (I)
M0(LOW) (I)
LDC (LOW)
CCLK (O)
MASTER
SERIAL
<0:0:0>
DIN (I)
DONE
DOUT
TMS
TDO
INIT
TCK
TDI
Product Obsolete or Under Obsolescence
CONFIGURATION MODE <M2:M1:M0>
RDY/BUSY (O)
PERIPHERAL
PROGRAM (I)
M1(HIGH) (I)
M0(HIGH) (I)
M2(LOW) (I)
HDC (HIGH)
LDC (LOW)
DATA 7 (I)
DATA 6 (I)
DATA 5 (I)
DATA 4 (I)
DATA 3 (I)
DATA 2 (I)
DATA 1 (I)
DATA 0 (I)
SYNCH.
CCLK (I)
<0:1:1>
DONE
DOUT
TCK
TMS
TDO
INIT
TDI
RDY/BUSY (O)
PERIPHERAL
PROGRAM (I)
M2(HIGH) (I)
M0(HIGH) (I)
HDC (HIGH)
M1(LOW) (I)
LDC (LOW)
DATA 7 (I)
DATA 6 (I)
DATA 5 (I)
DATA 4 (I)
DATA 3 (I)
DATA 2 (I)
DATA 1 (I)
DATA 0 (I)
ASYNCH.
CCLK (O)
<1:0:1>
CS0 (I)
DONE
DOUT
WS (I)
RS (I)
TMS
TDO
INIT
TCK
CS1
TDI
PARALLEL DOWN
PROGRAM (I)
M2(HIGH) (I)
M1(HIGH) (I)
HDC (HIGH)
M0(LOW) (I)
LDC (LOW)
DATA 7 (I)
DATA 6 (I)
DATA 5 (I)
DATA 4 (I)
DATA 3 (I)
DATA 2 (I)
DATA 1 (I)
DATA 0 (I)
CCLK (O)
RCLK (O)
MASTER
<1:1:0>
DONE
DOUT
A18*
A19*
A20*
A21*
TMS
TDO
INIT
TCK
A10
A11
A12
A13
A14
A15
A16
A17
TDI
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
PARALLEL UP
PROGRAM (I)
M2(HIGH) (I)
HDC (HIGH)
M1(LOW) (I)
M0(LOW) (I)
LDC (LOW)
DATA 7 (I)
DATA 6 (I)
DATA 5 (I)
DATA 4 (I)
DATA 3 (I)
DATA 2 (I)
DATA 1 (I)
DATA 0 (I)
CCLK (O)
RCLK (O)
MASTER
<1:0:0>
DONE
DOUT
A18*
A19*
A20*
A21*
TCK
TMS
TDO
INIT
A10
A11
A12
A13
A14
A15
A16
A17
TDI
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
May 14, 1999 (Version 1.6)
SGCK4-GCK6-I/O
PGCK4-GCK7-I/O
SGCK1-GCK8-I/O
PGCK1-GCK1-I/O
ALL OTHERS
OPERATION
PROGRAM
CCLK (I)
TDO-(O)
TCK-I/O
TMS-I/O
TDI-I/O
USER
DONE
(O)
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
(I)
(I)
R