XC5VLX110T-1FFG1136CES Xilinx Inc, XC5VLX110T-1FFG1136CES Datasheet - Page 171

IC FPGA VIRTEX5 ES 110K 1136FBGA

XC5VLX110T-1FFG1136CES

Manufacturer Part Number
XC5VLX110T-1FFG1136CES
Description
IC FPGA VIRTEX5 ES 110K 1136FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr

Specifications of XC5VLX110T-1FFG1136CES

Number Of Logic Elements/cells
110592
Number Of Labs/clbs
8640
Total Ram Bits
5455872
Number Of I /o
640
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1136-BBGA, FCBGA
For Use With
HW-V5-ML523-FXT-UNI-G-J - BOARD EVAL FOR VIRTEX-5HW-V5-ML523-FXT-UNI-G - BOARD EVAL FOR VIRTEX-5HW-V5-ML523-UNI-G - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC5VLX110T-1FFG1136CES
Manufacturer:
Xilinx Inc
Quantity:
10 000
Legal Block RAM and FIFO Combinations
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Block RAM ECC VHDL and Verilog Templates
VHDL and Verilog templates are available in the Libraries Guide.
The block RAM–FIFO combinations shown in
RAMB36 primitive. When placing block RAM and FIFO primitives in the same location,
the FIFO must occupy the lower port.
X-Ref Target - Figure 4-33
RAMB18
RAMB18
Figure 4-33: Legal Block RAM and FIFO Combinations
www.xilinx.com
RAMB18SDP
RAMB18SDP
Legal Block RAM and FIFO Combinations
Figure 4-33
RAMB18
FIFO18
are supported in a single
RAMB18SDP
FIFO18_36
ug0190_4_35_050208
171

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