EZ80L925048MODG Zilog, EZ80L925048MODG Datasheet - Page 21

IC WEBSERVER 48MHZ 1MB MOD

EZ80L925048MODG

Manufacturer Part Number
EZ80L925048MODG
Description
IC WEBSERVER 48MHZ 1MB MOD
Manufacturer
Zilog
Datasheet

Specifications of EZ80L925048MODG

Module/board Type
Development Module
Processor To Be Evaluated
EZ80L92
Interface Type
JTAG
For Use With/related Products
eZ80L92
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4670
EZ80L925048MODG
Q2608719
IrDA Transceiver
Reset Generator
PS017005-0903
Static RAM
Flash Memory
The eZ80L92 Module features 512 KB of fast SRAM. Access speed is typically
12 ns or faster, allowing zero-wait-state operation at 48 MHz. With the CPU at
48 MHz, onboard SRAM can be accessed with zero wait states in eZ80 mode.
CS1_CTL (chip select CS1) can be set to
The Flash Boot Loader, application code, and user configuration data are held
permanently in NOR Flash memory. A typical application requires eight times
more ROM for code than RAM. As an example, for 128 KB onboard SRAM, 1 MB
of ROM is required. The eZ80L92 Module allows NOR Flash memories between
4 megabits (512 KB) and 32 megabits (4 MB) to be used. The chips are housed in
wide TSOP40 cases. Flash ROM access times are 55–150 ns; typically 90 ns.
NOR Flash should be operated in Intel bus mode to satisfy setup and hold times
and to prevent bus contention with a
proper CPU operation at 48 MHz, first set the bus mode control register
CS0_BMC (I/O address
CS0_CTL (I/O address
two system clocks per bus cycle and zero wait states.
An onboard IrDA transceiver (ZiLOG ZHX1810) is connected to PD0 (TX), PD1
(RX), and PD2 (Shutdown, R_SD). The IrDA transceiver is of the LED type
870 nm Class 1.
The receiver supply current is 90–150 µA and the transmitter supply current is
260 mA when the LED is active.The IrDA transceiver is accessible via the IrDA
controller attached to UART0 on the eZ80L92 device. The UART0 console and
the IrDA transceiver cannot be used simultaneously.
To use the UART0 for console or to save power, the transceiver can be disabled
by the software or by an off-board signal when using the proper jumper selection.
The transceiver is disabled by setting PD2 (IR_SD) High or by pulling the
DIS_IRDA pin on the I/O connector Low. The shutdown is used for power savings.
To enable the IrDA transceiver, DIS_IRDA is left floating and PD2 is set to Low.
The onboard Reset Generator Chip performs reliable Power-On Reset. The chip
generates a reset pulse with a duration of 200 ms if the power supply drops below
0xAAh
0xF0h
P R E L I M I N A R Y
) to
) to
08h
82h
Write
. These settings select Intel Bus Mode with
, then set the Chip Select Control register
eZ80L92 Module Product Specification
08h
cycle that could possibly follow. For
(no wait states).
Onboard Component Description
eZ80L925048MOD
15

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