MB86R01PB-GSE1 Fujitsu Semiconductor America Inc, MB86R01PB-GSE1 Datasheet - Page 3

• Manufacturer Part Number: MB86R01PB-GSE1
• Description: IC SOC GRAPHIC CONTRLR 484BGA
• Manufacturer: Fujitsu Semiconductor America Inc

Specifications of MB86R01PB-GSE1

• Applications: Graphics Controller
• Core Processor: ARM9
• Program Memory Type: External Program Memory
• Controller Series: Jade
• Ram Size: 64K x 8
• Interface: ADC, ATA, CAN, EBI/EMI, I²C, I²S, Media LB, PWM, SD Card, UART/USART, USB
• Number Of I /o: 24
• Voltage - Supply: 1.1 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 484-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 865-1110

FUJITSU MICROELECTRONICS
PROPRIETARY AND CONFIDENTIAL
MB86R01 DATA SHEET
2007/07/12
2007/08/20
2008/02/07
2007/11/09
Date
Ver.
1.0
1.1
1.2
1.3
Newly issued
8.3.1. Recommended Power On/Off Sequence
8.4.3. ADC
8.4.4. I
8.5.9. I
8.5.12. MLB Signal Timing
4. Function list
6. Pin assignment
7.1. Pin Multiplex
7.2.4. USB 2.0 Host/Function related pin
7.2.5. External interrupt controller related pin
7.2.12. A/D converter related pin
7.2.24. Unused pin
7.2.25. Unused pin with pin multiplex function in the duplex case
8.4.2. DDR2SDRAM IF I/O (SSTL_18)
8.5.1. Memory Controller Signal Timing
8.5.6.2. Input Signal
6. Pin assignment
7.2.2. IDE66 related pin
7.2.3. SD memory controller related pin
7.2.7. CAN related pin
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
2
2
C Bus Fast Mode I/O
C Bus Timing
Revised the last line of description (PLL reference clock part)
Revised value of table 8-16
Revised and deleted descriptive content of note
Revised footnote (*2) of table 8-17
Revised table 8-18 and footnote
Deleted footnote (*3)
Revised footnote (*2) of table 8-37
Revised MLB to MediaLB
Revised footnote of table 8-42, 8-45
Revised contents of the list
Revised figures in 1-8/1-9 pages
Added "top view" statement
Revised description of note
Added mode setting description to pin multiplex group #1 ~ #5
Revised table of pin multiplex group #2 and #4
Revised description of USB_EXT12K pin
Revised title
Revised pin name: AD_AVD0 → AD_AVD, AD_AVS1 → AD_AVS
Added this section
Added this section
Revised table 8-12
Revised table 8-21
Revised figure 8-8 and 8-9
Added figure 8-10, 8-11, and 8-12
Revised figure 8-23
Revised figure and table
Revised type
Revised status pin after reset
Unified SD_DAT[0] and SD_DAT[3:1]
Revised type
Revision History
ii
Contents