CY7C64613-80NC Cypress Semiconductor Corp, CY7C64613-80NC Datasheet - Page 21

• Manufacturer Part Number: CY7C64613-80NC
• Description: IC MCU USB EZ FX 8K RAM 80-PQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX™r

Specifications of CY7C64613-80NC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C646xx
• Ram Size: 8K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 80-MQFP, 80-PQFP
• For Use With: 428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1312

4.0
Document #: 38-08005 Rev. **
7828-7829 (reserved)
782B (reserved)
782F (reserved)
7833 (reserved)
7837(reserved)
783A (reserved)
781D ABPOLAR
782C AINTC
782D AOUTTC
783C GENIRQ
Addr
781E ABFLUSH
7824 WFSELECT
7825 IDLE_CS
7826 IDLECTLOUT
7827 CTLOUTCFG
782A GPIFADRL
782E ATRIG
7830 BINTC
7831 BOUTTC
7832 BTRIG
7834 SGLDATH
7835 SGLDATLTRIG GPIF Data Low and Trigger
7836 SGLDATLN-
7838 READY
7839 ABORT
783B GENIE
7841 OUTD
7842 PINSD
7843 OED
7845 OUTE
7846 PINSE
7847 OEE
7849 PORTSETUP
784A IFCONFIG
784B PORTACF2
781F-7823 (reserved)
783D-7840 (reserved)
7844 (reserved)
7848 (reserved)
TRIG
IO Ports D, E
Register Summary
Name
FIFO Control Signals
Polarity
Write (data=x) to reset all
flags
Waveform Selector
GPIF IDLE State control
GPIF IDLE CTL states
GPIF CTL Drive mode
GPIF Address
FIFO A In Transfer Count
FIFO A Out Transfer Count
Trigger a FIFO A RD/WR
FIFO B In Transfer Count
FIFO B Out Transfer Count
Trigger a FIFO B RD/WR
GPIF Data High
GPIF Data Low and No
Trigger
GPIF Ready flags
Abort current GPIF cycle
GPIF/DMA Interrupt Enable
GPIF/DMA Interrupt
Request
Output Port D
Input Port D pins
Port D Output Enable
Output Port E
Input Port E pins
Port E Output Enable
Timer0 Clock source,
Port-to-SFR mapping
Select 8/16 bit data bus,
configure buses (IF)
Port A Configuration #2
Description
(continued)
INTRDY
TRICTL
OUTD7
OUTE7
52ONE
PIND7
DONE
PINE7
OEE7
0ED7
IOE3
FITC
FITC
FITC
FITC
D15
D7
D7
D7
0
0
0
0
0
*
SINGLEWR
*
*
*
*
OUTD6
OUTE6
PIND6
PINE6
OEE6
0ED6
IOE2
SAS
D14
D6
D6
D6
0
0
0
0
0
0
0
0
*
*
*
*
*
OUTD5
OUTE5
PIND5
PINE5
OEE5
ADR5
RDY5
SLRD
IOE1/
CTL5
CTL5
0ED5
BOE
D13
D5
D5
D5
0
0
0
0
0
*
*
*
*
SINGLERD
OUTD4
OUTE4
PIND4
PINE4
SLWR
ADR4
RDY4
OEE4
IOE0/
0ED4
CTL4
CTL4
AOE
D12
D4
D4
D4
0
0
0
0
0
*
*
*
*
Transfer Count
Transfer Count
Transfer Count
Transfer Count
GSTATE
OUTD3
OUTE3
PIND3
PINE3
SLRD
ADR3
RDY3
OEE3
CTL3
CTL3
0ED3
D11
D3
D3
D3
0
0
0
0
0
*
*
*
*
FIFOWR
CY7C64601/603/613
DMADN
DMADN
OUTD2
OUTE2
BUS16
PIND2
PINE2
SLWR
OEE2
ADR2
RDY2
CTL2
CTL2
0ED2
D10
D2
D2
D2
0
0
0
*
*
*
*
OUTD1
OUTE1
GPWR
GPWR
T0CLK
PIND1
PINE1
ADR1
RDY1
OEE1
ASEL
CTL1
CTL1
0ED1
IF1
D1
D9
D1
D1
0
0
*
*
*
*
Page 21 of 42
FIFORD
IDLEDRV
GPDONE
GPDONE
SFRPORT
OUTD0
OUTE0
PIND0
PINE0
ADR0
RDY0
OEE0
BSEL
0ED0
CTL0
CTL0
IF0
D0
D8
D0
D0
0
*
*
*
*