CY7C68013-100AC Cypress Semiconductor Corp, CY7C68013-100AC Datasheet - Page 44

• Manufacturer Part Number: CY7C68013-100AC
• Description: IC MCU USB PERIPH HI SPD 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX2LP™r

Specifications of CY7C68013-100AC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C680xx
• Ram Size: 16K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 40
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: Q1802289

Table 9-10. Slave FIFO Synchronous Write Parameters with Externally Sourced IFCLK
9.9
Table 9-11. Slave FIFO Asynchronous Write Parameters with Internally Sourced IFCLK
9.10
Table 9-12. Slave FIFO Synchronous Packet End Strobe Parameters with Internally Sourced IFCLK
Document #: 38-08012 Rev. *C
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
IFCLK
SWR
WRH
SFD
FDH
XFLG
WRpwl
WRpwh
SFD
FDH
XFD
IFCLK
SPE
PEH
XFLG
Parameter
Parameter
Parameter
Slave FIFO Asynchronous Write
Slave FIFO Synchronous Packet End Strobe
IFCLK Period
SLWR to Clock Set-up Time
Clock to SLWR Hold Time
FIFO Data to Clock Set-up Time
Clock to FIFO Data Hold Time
Clock to FLAGS Output Propagation Time
SLWR Pulse LOW
SLWR Pulse HIGH
SLWR to FIFO DATA Set-up Time
FIFO DATA to SLWR Hold Time
SLWR to FLAGS Output Propagation Delay
IFCLK Period
PKTEND to Clock Set-up Time
Clock to PKTEND Hold Time
Clock to FLAGS Output Propagation Delay
Figure 9-9. Slave FIFO Synchronous Packet End Strobe Timing Diagram
SLWR/SLCS#
Figure 9-8. Slave FIFO Asynchronous Write Timing Diagram
PKTEND
FLAGS
DATA
FLAGS
IFCLK
Description
Description
Description
t
WRpwl
t
SFD
t
XFD
t
FDH
t
SPE
t
WRpwh
t
PEH
t
XFLG
20.83
20.83
Min.
12.1
Min.
Min.
14.6
3.6
3.2
4.5
50
70
10
10
0
[15]
[16]
[13]
Max.
Max.
Max.
13.5
200
9.5
70
[13]
[15]
CY7C68013
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Unit
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns