CY8C20446-24LQXIT Cypress Semiconductor Corp, CY8C20446-24LQXIT Datasheet - Page 16
![no-image](/images/manufacturer_photos/0/1/179/cypress_semiconductor_corp_sml.jpg)
CY8C20446-24LQXIT
Manufacturer Part Number
CY8C20446-24LQXIT
Description
IC CAPSENSE AP 16K 2048B 32UQFN
Manufacturer
Cypress Semiconductor Corp
Series
CapSense® Controllersr
Specifications of CY8C20446-24LQXIT
Applications
Capacitive Sensing
Core Processor
M8C
Program Memory Type
FLASH (16 kB)
Controller Series
CY8C20xx6
Ram Size
2K x 8
Interface
I²C, SPI
Number Of I /o
28
Voltage - Supply
1.71 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-UQFN Exposed Pad, 32-HUQFN, 32-SQFN
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Technology
CMOS
Processing Unit
Microprocessor
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (typ)
1.8/2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Package Type
QFN EP
Screening Level
Industrial
Pin Count
32
Mounting
Surface Mount
Rad Hardened
No
Processor Series
CY8C20x46
Core
M8C
Development Tools By Supplier
CY3280-20X66
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Comparator User Module Electrical Specifications
The following table lists the guaranteed maximum and minimum specifications. Unless stated otherwise, the specifications are for the
entire device voltage and temperature operating range: –40°C <= TA <= 85°C, 1.71V <= Vdd <= 5.5V.
Table 10. Comparator User Module Electrical Specifications
ADC Electrical Specifications
Table 11. ADC User Module Electrical Specifications
Note
Document Number: 001-12696 Rev. *D
T
Offset
Current
PSRR
Input
Range
Input
DC Accuracy
5. Monotonicity is not guaranteed.
Symbol
Symbol
COMP
Eoffset
DNL
PSRR
Egain
F
RES
I
S10
C
INL
R
V
ADC
S8
CLK
IN
IN
IN
[5]
Comparator Response Time
Supply voltage >2V
Supply voltage <2V
Input Voltage Range
Input Capacitance
Resolution
8-Bit Sample Rate
10-Bit Sample Rate
Differential Nonlinearity
Integral Nonlinearity
Operating Current
Data Clock
Power Supply Rejection Ration
Gain Error
Input Resistance
Offset Error
PSRR (Vdd>3.0V)
PSRR (2.2 < Vdd < 3.0)
PSRR (2.0 < Vdd < 2.2)
PSRR (Vdd < 2.0)
Description
Description
Data-Clock)
1/(500fF*
2.25
Min
Min
Vss
-1
-2
0
8
0
1
Data-Clock)
1/(400fF*
23.4375
5.859
Typ
Typ
275
2.5
70
20
80
40
15
24
30
12
0
Data-Clock)
1/(300fF*
CY8C20x36/46/66, CY8C20396
Max
Max
100
350
1.5
1.3
dB
dB
dB
dB
30
80
10
+2
+2
90
12
5
5
%FSR For any resolution
Units
Units
ksps
ksps
MHz
LSB
LSB
Bits
mV
mV
µA
dB
dB
pF
μA
ns
Ω
V
V
50 mV overdrive
Average DC current, 50 mV
overdrive
Power Supply Rejection Ratio
Power Supply Rejection Ratio
This gives 72% of maximum
code
Settings 8, 9, or 10
Data Clock set to 6 MHz.
Sample Rate = 0.001/
(2^Resolution/Data clock)
Data Clock set to 6 MHz.
Sample Rate = 0.001/
(2^Resolution/Data clock)
For any configuration
For any configuration
Source is chip’s internal main
oscillator. See device data
sheet for accuracy.
Equivalent switched cap input
resistance for 8-, 9-, or 10-bit
resolution.
Conditions
Conditions
Page 16 of 34
[+] Feedback