Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 189
Z8018010PSG
Manufacturer Part Number
Z8018010PSG
Description
IC 10MHZ Z180 CMOS ENH MPU 64DIP
Manufacturer
Zilog
Specifications of Z8018010PSG
Processor Type
Z180
Features
8-Bit, Enhanced Z80 Megacell
Speed
10MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
64-DIP (0.750", 19.05mm)
Processor Series
Z8018xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
10 MHz
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Core Size
8bit
Cpu Speed
10MHz
Digital Ic Case Style
DIP
No. Of Pins
64
Supply Voltage Range
4.5V To 5.5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
8018010
Rohs Compliant
Yes
Clock Frequency
10MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3889
Z8018010PSG
Z8018010PSG
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
Z8018010PSG
Manufacturer:
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UM005003-0703
Z8018x
Family MPU User Manual
MLT- Multiply
The MLT performs unsigned multiplication on two 8-bit numbers yielding a
16-bit result. MLT may specify BC, DE, HL, or SP registers. The 8-bit
operands are loaded into each half of the 16-bit register and the 16-bit result
is returned in that register.
OTIM, OTIMR, OTDM, OTDMR - Block I/O
The contents of memory pointed to by HL is output to the I/O address in (C).
The memory address (HL) and I/O address (C) are incremented in OTIM
and OTIMR and decremented in OTDM and OTDMR, respectively. The B
register is decremented. The OTIMR and OTDMR variants repeat the above
sequence until register B is decremented to 0. Since the I/O address (C) is
automatically incremented or decremented, these instructions are useful for
block I/O (such as Z80180 on-chip I/O) initialization. When I/O is accessed,
00H is output in high-order bits of address automatically.
TSTIO m - Test I/O Port
The contents of the I/O port addressed by C are ANDed with immediately
specified 8-bit data and the status flags are updated. The I/O port contents
are not written (non-destructive AND). When I/O is accessed,
output in higher bits of address automatically.
TST g - Test Register
Perform an
the accumulator (A) and the status flags are updated. The accumulator
and specified register are not changed (non-destructive
TST m - Test Immediate
Perform an
8-bit data with the accumulator (A) and the status flags are updated. The
accumulator is not changed (non-destructive
AND
AND
instruction on the contents of the specified register with
instruction on the contents of the immediately specified
AND
).
AND
).
00H
is
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