Z85C3010PEG Zilog, Z85C3010PEG Datasheet - Page 5
![IC 10MHZ Z8500 CMOS SCC 40-DIP](/photos/6/57/65796/269-40-dip_sml.jpg)
Z85C3010PEG
Manufacturer Part Number
Z85C3010PEG
Description
IC 10MHZ Z8500 CMOS SCC 40-DIP
Manufacturer
Zilog
Specifications of Z85C3010PEG
Processor Type
Z80
Features
Error Detection and Multiprotocol Support
Speed
10MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3933
Z85C3010PEG
Z85C3010PEG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z85C3010PEG
Manufacturer:
Zilog
Quantity:
2
Company:
Part Number:
Z85C3010PEG
Manufacturer:
Zilog
Quantity:
99
Overview
PS011705-0608
The features of Zilog’s Z80C30 and Z85C30 devices include:
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Z85C30 — Optimized for Non-Multiplexed Bus Microprocessors.
Z80C30 — Optimized for Multiplexed Bus Microprocessors.
Pin Compatible to NMOS Versions.
Two Independent, 0 to 4.1 Mbit/Second, Full-Duplex Channels. Each channel with
Separate Crystal Oscillator, Baud Rate Generator (BRG), and Digital Phase-Locked
Loop (DPLL) for Clock Recovery.
Multi-Protocol Operation under Program Control; Programmable for NRZ, NRZI, or
FM Data Encoding.
Asynchronous Mode with Five to Eight Bits and One, One and One-Half, or Two
Stop Bits Per Character, Programmable Clock Factor, Break Detection and
Generation; Parity, Overrun, and Framing Error Detection.
Synchronous Mode with Internal or External Character Synchronization on One or
Two Synchronous Characters and CRC Generation and Checking with CRC-16 or
CRC-CCITT Preset to either 1s or 0s.
SDLC/HDLC Mode with Comprehensive Frame-Level Control, Automatic Zero
Insertion and Deletion, I-Field Residue Handling, Abort Generation and Detection,
CRC Generation and Checking, and SDLC Loop.
Software Interrupt Acknowledge Feature (not available with NMOS).
Local Loopback and Auto Echo Modes.
Supports T1 Digital Trunk.
Enhanced DMA Support (not available with NMOS) 10 x 19-Bit Status FIFO 14-Bit
Byte Counter.
Speeds:
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Z85C3O — 8.5, 10, 16.384 MHz
Z80C3O — 8, 10 MHz
CMOS SCC Serial Communications Controller
Product Specification
Overview
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