NG80960JS25 Intel, NG80960JS25 Datasheet - Page 17
![IC MPU I960JS 3V 25MHZ 132-QFP](/photos/6/77/67770/ng80960js25_sml.jpg)
NG80960JS25
Manufacturer Part Number
NG80960JS25
Description
IC MPU I960JS 3V 25MHZ 132-QFP
Manufacturer
Intel
Datasheet
1.NG80960JS25.pdf
(86 pages)
Specifications of NG80960JS25
Rohs Status
RoHS non-compliant
Processor Type
i960
Features
JS suffix, 32-Bit, 16K Cache
Speed
25MHz
Voltage
3V
Mounting Type
Surface Mount
Package / Case
132-QFP
Other names
820348
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Datasheet
Table 7. Pin Description Nomenclature
Symbol
A (...)
R (...)
H (...)
P (...)
I/O
O
S
–
I
Input pin only.
Output pin only.
Pin may be either an input or output.
Pin must be connected as described.
Synchronous. Inputs must meet setup and hold times relative to CLKIN for proper operation.
Asynchronous. Inputs may be asynchronous relative to CLKIN.
While the processor’s RESET# pin is asserted, the pin:
While the processor is in the hold state, the pin:
While the processor is halted, the pin:
S(E) Edge sensitive input
S(L) Level sensitive input
A(E) Edge sensitive input
A(L) Level sensitive input
R(1) is driven to V
R(0) is driven to V
R(Q) is a valid output
R(X) is driven to unknown state
R(H) is pulled up to V
H(1) is driven to V
H(0) is driven to V
H(Q) Maintains previous state or continues to be a valid output
H(Z) Floats
P(1) is driven to V
P(0) is driven to V
P(Q) Maintains previous state or continues to be a valid output
80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor
CC
SS
CC
SS
CC
SS
CC
Description
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