Z8S18010VSC00TR Zilog, Z8S18010VSC00TR Datasheet - Page 48
Z8S18010VSC00TR
Manufacturer Part Number
Z8S18010VSC00TR
Description
IC Z180 MPU 68PLCC
Manufacturer
Zilog
Datasheet
1.Z8S18010PSG.pdf
(71 pages)
Specifications of Z8S18010VSC00TR
Processor Type
Z180
Speed
10MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
68-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
to
The Timer Control Register (
(
rements to
interrupt request if enabled by
when
is read. During
rements to
interrupt request if enabled by
when
is read. During
ister is
1
,
is reset to
and
,
control the output of
1
, the
is read and the higher or lower byte of
is read and the higher or lower byte of
0
0
pin as indicated in Table 12. During
,
,
is cleared to
)
1
0
, the interrupt request is inhibited. During
generates a CPU interrupt request. When
are cleared to
is set to
is set to
function is selected. By programming
,
,
status. It also controls the enabling
0
1
1
.
. This condition generates an
. This condition generates an
is cleared to
is cleared to
0
. If bit 3 of the
) monitors both channels
using the multiplexed
When
1
1
When
.
.
When
0
0
.
.
is reset to
is reset to
is set
dec-
dec-
and
reg-
0
0
,
and disabling of down-counting and interrupts, and controls
the output pin
Low, or toggled when
and
and
1
written.
, down-counting is stopped and
and
does not decrement until
enable and disable down-counting for
, respectively. When
and
, the
are cleared to
for
decrements to
pin can be forced High,
.
0
(
during
is set to .
is freely read or
0
, ) is set to
.
ZiLOG
and