Z8S18010PEC Zilog, Z8S18010PEC Datasheet - Page 54

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Z8S18010PEC

Manufacturer Part Number
Z8S18010PEC
Description
IC 10MHZ STATIC Z180 64-DIP
Manufacturer
Zilog
Datasheet

Specifications of Z8S18010PEC

Processor Type
Z180
Features
Enhanced Z180
Speed
10MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
64-DIP (0.750", 19.05mm)
Processor Series
Z8S180X
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
10 MHz
Number Of Timers
2 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
Z8S18000ZEM
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3099
The DMA Destination Address Register Channel 0
specifies the physical destination address for channel 0
transfers. The register contains 20 bits and can specify up
to 1024-KB memory addresses or up to 64-KB I/O
addresses. Channel 0 destination can be memory, I/O, or
memory mapped I/O. For I/O, the
identify the Request Handshake signal for channel 0.
bits of this register
If the DMA destination is in I/O space, bits
ister select the DMA request signal for DMA0, as follows:
of this reg-
ZiLOG

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