Z85C3008VEG Zilog, Z85C3008VEG Datasheet - Page 23

• Manufacturer Part Number: Z85C3008VEG
• Description: IC 8MHZ Z8500 CMOS SCC 44-PLCC
• Manufacturer: Zilog

Specifications of Z85C3008VEG

• Processor Type: Z80
• Features: Error Detection and Multiprotocol Support
• Speed: 8MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3931; Z85C3008VEG

PS011705-0608
Marking Line
SYNC
Flag
When the INTACK and IEI pins are not being used, they should be pulled up to V
through a resistor (10 K
CPU/DMA Block Transfer
The SCC provides a Block Transfer mode to accommodate CPU block transfer functions
and DMA controllers. The Block Transfer mode uses the WAIT/REOUEST output in con-
junction with the Wait/Request bits in WR1. The WAIT/REOUEST output can be
defined under software control as a WAIT line in the CPU Block Transfer mode or as a
REQUEST line in the DMA Block Transfer mode.
To a DMA controller, the SCC REQUEST output indicates that the SCC is ready to trans-
fer data to or from memory To the CPU, the WAIT line indicates that the ESCC is not
ready to transfer data, thereby requesting that the CPU extend the I/O cycle. The DTR/
REQUEST line allows full-duplex operation under DMA control.
SCC Data Communications Capabilities
The SCC provides two independent full-duplex programmable channels for use in any
common asynchronous or synchronous data communication protocols (see
page 19). Each data communication channel has identical feature and capabilities.
Address
SYNC
SYNC
Signal
Start
Data
Data
Data
Data
Information
Figure 9. Some SCC Protocols
Parity
Ω
SDLC/HDLC/X.25
typical).
Asynchronous
External Sync
Monosync
Stop
Bisync
Data
CMOS SCC Serial Communications Controller
Information
Data
Data
Data
Data
CRC1
CRC1
CRC1
CRC1
CRC2
CRC2
CRC2
CRC2
Product Specification
Functional Description
Marking Line
Flag
Figure 9
CC
on
19