EZ80L92AZ020EG Zilog, EZ80L92AZ020EG Datasheet - Page 33
![IC WEBSERVER 20MHZ 100LQFP](/photos/6/76/67664/269-100-lqfp_sml.jpg)
EZ80L92AZ020EG
Manufacturer Part Number
EZ80L92AZ020EG
Description
IC WEBSERVER 20MHZ 100LQFP
Manufacturer
Zilog
Datasheet
1.EZ80L92AZ020SG.pdf
(231 pages)
Specifications of EZ80L92AZ020EG
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
20MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Processor Series
EZ80L92x
Core
eZ80
Data Bus Width
8 bit
Program Memory Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80L920210ZCO
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3875
EZ80L92AZ020EG
EZ80L92AZ020EG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Table 3. Register Map (Continued)
PS013014-0107
Address
(hex)
00A3
00A4
00A5
Chip Select/Wait State Generator
00A8
00A9
00AA
00AB
00AC
00AD
00AE
00AF
00B0
00B1
Chip Select/Wait State Generator
00B2
00B3
Serial Peripheral Interface (SPI) Block
00B8
00B9
00BA
00BB
00BC
Infrared Encoder/Decoder Block
00BF
Mnemonic
PD_DDR
PD_ALT1
PD_ALT2
CS0_LBR
CS0_UBR
CS0_CTL
CS1_LBR
CS1_UBR
CS1_CTL
CS2_LBR
CS2_UBR
CS2_CTL
CS3_LBR
CS3_UBR
CS3_CTL
SPI_BRG_L
SPI_BRG_H
SPI_CTL
SPI_SR
SPI_TSR
SPI_RBR
IR_CTL
Name
Port D Data Direction Register
Port D Alternate Register 1
Port D Alternate Register 2
Chip Select 0 Lower Bound Register
Chip Select 0 Upper Bound Register
Chip Select 0 Control Register
Chip Select 1 Lower Bound Register
Chip Select 1 Upper Bound Register
Chip Select 1 Control Register
Chip Select 2 Lower Bound Register
Chip Select 2 Upper Bound Register
Chip Select 2 Control Register
Chip Select 3 Lower Bound Register
Chip Select 3 Upper Bound Register
Chip Select 3 Control Register
SPI Baud Rate Generator
Register—Low Byte
SPI Baud Rate Generator
Register—High Byte
SPI Control Register
SPI Status Register
SPI Transmit Shift Register
SPI Receive Buffer Register
Infrared Encoder/Decoder Control
Reset
(hex)
XX
XX
FF
00
00
00
FF
E8
00
00
00
00
00
00
00
00
00
02
00
04
00
00
Product Specification
Access
CPU
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
eZ80L92 MCU
W
R
R
Register Map
Page
134
135
135
136
137
137
126
No
43
43
43
68
69
70
68
69
70
68
69
70
68
69
70
27
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