Z8018006PEC Zilog, Z8018006PEC Datasheet - Page 60

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Z8018006PEC

Manufacturer Part Number
Z8018006PEC
Description
IC 6MHZ Z180 CMOS ENH MPU 64-DIP
Manufacturer
Zilog
Datasheet

Specifications of Z8018006PEC

Processor Type
Z180
Features
8-Bit, Enhanced Z80 Megacell
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
64-DIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3005
Timer Data Register
DMA Source Address Register Channel 0
Timer Data Register
PS014004-1106
Free Running Counter I/O Address = 18H
DMA Source Address Register, Channel 0L
Mnemonic FRC: 18H
If data is written into the free running counter, the interval of DRAM refresh cycle and baud
rates for the ASCI and CSI/O are not guaranteed. In IOSTOP mode, the free running counter
continues counting down. It is initialized to FFH, during RESET.
(
transfers. The register contains 20 bits and can specify up to 1024 KB memory addresses or
up to 64 KB I/O addresses. Channel 0 source can be memory, I/O, or memory mapped I/O.
For I/O, the most significant bits of this register identify the
signal.
Mnemonic SAR0L: Address 20h
SAR0: I/O ADDRESS = 20h to 22h
7
7
Figure 47. Timer Data Register
6
6
Figure 48. DMA Channel 0L
5
5
4
4
) specifies the physical source address for channel 0
DMA Channel 0 Address
3
3
Counting Data
2
2
1
1
0
0
REQUEST HANDSHAKE
Microprocessor Unit
Architecture
Z80180
54

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