EZ80L92AZ020EC Zilog, EZ80L92AZ020EC Datasheet - Page 177
EZ80L92AZ020EC
Manufacturer Part Number
EZ80L92AZ020EC
Description
IC WEBSERVER 20MHZ 100LQFP
Manufacturer
Zilog
Datasheet
1.EZ80L92AZ020SG.pdf
(231 pages)
Specifications of EZ80L92AZ020EC
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
20MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3167
EZ80L92AZ020EC
EZ80L92AZ020EC
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PS013014-0107
Bit
Position
7
BRK_NEXT
6
brk_addr3
5
brk_addr2
4
brk_addr1
3
brk_addr0
2
ign_low_1
Value Description
0
1
0
1
0
1
0
1
0
1
0
1
The ZDI BREAK on the next CPU instruction is disabled.
Clearing this bit releases the CPU from its current BREAK
condition.
The ZDI BREAK on the next CPU instruction is enabled.
The CPU can use multibyte Op Codes and multibyte
operands. break points only occur on the first Op Code in a
multibyte Op Code instruction. If the ZCL pin is High and
the ZDA pin is Low at the end of RESET, this bit is set to 1
and a BREAK occurs on the first instruction following the
RESET. This bit is set automatically during ZDI BREAK on
address match. A BREAK can also be forced by writing a 1
to this bit.
The ZDI BREAK, upon matching break address 3,
is disabled.
The ZDI BREAK, upon matching break address 3,
is enabled.
The ZDI BREAK, upon matching break address 2,
is disabled.
The ZDI BREAK, upon matching break address 2,
is enabled.
The ZDI BREAK, upon matching break address 1,
is disabled.
The ZDI BREAK, upon matching break address 1,
is enabled.
The ZDI BREAK, upon matching break address 0,
is disabled.
The ZDI BREAK, upon matching break address 0,
is enabled.
The Ignore the Low Byte function of the ZDI Address Match
1 registers is disabled. If BRK_ADDR1 is set to 1, ZDI
initiates a BREAK when the entire 24-bit address,
ADDR[23:0], matches the 3-byte value {ZDI_ADDR1_U,
ZDI_ADDR1_H, ZDI_ADDR1_L}.
The Ignore the Low Byte function of the ZDI Address Match
1 registers is enabled. If BRK_ADDR1 is set to 1, ZDI
initiates a BREAK when only the upper 2 bytes of the 24-bit
address, ADDR[23:8], match the 2-byte value
{ZDI_ADDR1_U, ZDI_ADDR1_H}. As a result, a BREAK
can occur anywhere within a 256-byte page.
Product Specification
ZiLOG Debug Interface
eZ80L92 MCU
171
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