TA80C188XL20 Intel, TA80C188XL20 Datasheet - Page 44

• Manufacturer Part Number: TA80C188XL20
• Description: IC MPU 16-BIT 5V 20MHZ 68-PGA
• Manufacturer: Intel

Specifications of TA80C188XL20

• Rohs Status: RoHS non-compliant
• Processor Type: 80C188
• Features: XL suffix, 16-Bit, Extended Temp
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PGA
• Family Name: Intel186
• Device Core: 80188
• Device Core Size: 16b
• Frequency (max): 20MHz
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 68
• Package Type: CPGA
• Lead Free Status / Rohs Status: Compliant
• Other names: 803862

80C186XL 80C188XL
INSTRUCTION SET SUMMARY
Shaded areas indicate instructions not available in 8086 8088 microsystems
NOTE
44
ARITHMETIC (Continued)
IMUL
Register-Byte
Register-Word
Memory-Byte
Memory-Word
IMUL
DIV
Register-Byte
Register-Word
Memory-Byte
Memory-Word
IDIV
Register-Byte
Register-Word
Memory-Byte
Memory-Word
AAM
AAD
CBW
CWD
LOGIC
Shift Rotate Instructions
Register Memory by 1
Register Memory by CL
Register Memory by Count
AND
Reg memory and register to either
Immediate to register memory
Immediate to accumulator
TEST
Register memory and register
Immediate data and register memory
Immediate data and accumulator
OR
Reg memory and register to either
Immediate to register memory
Immediate to accumulator
Clock cycles shown for byte transfers For word operations add 4 clock cycles for all memory transfers
(signed)
e
e
e
e
e
Or
e
e
e
e
e
e
Divide (unsigned)
Integer divide (signed)
And function to flags no result
ASCII adjust for divide
And
ASCII adjust for multiply
Convert byte to word
Integer multiply (signed)
Integer Immediate multiply
Convert word to double word
Function
1 1 1 1 0 1 1 w
1 1 1 1 0 1 1 w
1 1 1 1 0 1 1 w
1 1 0 1 0 0 0 w
1 1 0 1 0 0 1 w
1 1 0 0 0 0 0 w
0 0 1 0 0 0 d w
1 0 0 0 0 0 0 w
0 0 1 0 0 1 0 w
1 0 0 0 0 1 0 w
1 1 1 1 0 1 1 w
1 0 1 0 1 0 0 w
0 0 0 0 1 0 d w
1 0 0 0 0 0 0 w
0 0 0 0 1 1 0 w
0 1 1 0 1 0 s 1
1 1 0 1 0 1 0 0
1 1 0 1 0 1 0 1
1 0 0 1 1 0 0 0
1 0 0 1 1 0 0 1
TTT Instruction
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0 SHL SAL
1 0 1
1 1 1
(Continued)
mod 1 0 1 r m
mod 1 1 0 r m
mod 1 1 1 r m
mod 1 0 0 r m
mod 0 0 0 r m
mod 0 0 1 r m
0 0 0 0 1 0 1 0
0 0 0 0 1 0 1 0
mod TTT r m
mod TTT r m
mod TTT r m
mod reg r m
mod reg r m
mod reg r m
mod reg r m
data
data
data
ROL
ROR
RCL
RCR
SHR
SAR
Format
data if w
data if w
data if w
count
data
data
data
data
e
e
e
1
1
1
data if w
data if w
data if w
data if s
e
e
e
e
0
1
1
1
5
5
80C186XL
a
a
22–25
Cycles
25–28
34–37
31–34
40–43
29–32
44–52
53–61
50–58
59–67
Clock
2 15
3 10
4 16
3 10
4 10
3 10
4 16
n 17
n 17
3 4
3 4
3 4
29
38
35
44
19
15
2
4
a
a
n 5
n 5
80C188XL
a
a
22–25
Cycles
25–28
34–37
32–34
40–43
29–32
53–61
50–58
59–67
Clock
44-52
2 15
3 10
4 16
3 10
4 10
3 10
4 16
n 17
n 17
3 4
3 4
3 4
29
38
35
44
19
15
2
4
a
a
n
n
Comments
8 16-bit
8 16-bit
8 16-bit