CY7C344B-15JC Cypress Semiconductor Corp, CY7C344B-15JC Datasheet
CY7C344B-15JC
Specifications of CY7C344B-15JC
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CY7C344B-15JC Summary of contents
Page 1
... All inputs, macrocells, and I/O pins are interconnected within the LAB. The speed and density of the CY7C344B makes it a natural for all types of applications. With just this one device, the designer can implement complex state machines, registered logic, and combinatorial “ ...
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... CC Test Conditions 1.0 MHz 0V 1.0 MHz OUT R1 464 250 (b) C344B–5 1.75V C344B–7 parameter refers to low-level TTL output current. OL CY7C344B [2] ...................– +25 mA [2] .........................................–2.0V to +7.0V Ambient Temperature – +70 C – +85 C Min. Max. 4.75(4.5) 5.25(5.5) 2.4 0.45 2.0 V +0.3 CC –0.3 0.8 – ...
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... Exposure to absolute maximum ratings conditions for extended periods of time may affect device reliability. The CY7C344B contains circuitry to protect device pins from high-static voltages or electric fields; however, normal precautions should be taken to avoid apply- ing any voltage higher than maximum rated voltages ...
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... RSU DELAY LAD SYSTEM CLOCK DELAYt ICS CLOCK DELAY t IC FEEDBACK DELAY t FD Figure 1. CY7C344B Timing Model Over Operating Range Description [4] Com’l/Ind [4] Com’l/Ind Com’l/Ind [4] Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind [5] Com’l/Ind Com’l/Ind Com’l/Ind [6] Com’ ...
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... Com’l/Ind Com’l/Ind [4] Com’l/Ind [4] Com’l /Ind [4] Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind CY7C344B 7C344B-15 7C344B-20 7C344B-25 Min. Max. Min. Max. Min. Max ...
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... External Asynchronous DEDICATED INPUTS OR REGISTERED FEEDBACK ASYNCHRONOUS CLOCK INPUT Internal Synchronous CLOCK FROM LOGIC ARRAY t RD DATA FROM LOGIC ARRAY OUTPUT PIN Document #: 38-03036 Rev PD1 PD2 CO1 AS1 CY7C344B C344B-11 C344B- AWH AWL C344B– HIGH IMPEDANCE STATE Page C344B-14 ...
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... CLOCK INTO LOGIC ARRAY CLOCK FROM LOGIC ARRAY DATA FROM LOGIC ARRAY REGISTER OUTPUT TO LOCAL LAB LOGIC ARRAY REGISTER OUTPUT TO ANOTHER LAB Document #: 38-03036 Rev EXP t AWL RSU LATCH FD t PIA CY7C344B LAC LAD t t COMB OD C344B- CLR PRE FD C344B-16 Page ...
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... Switching Waveforms (continued) Internal Synchronous SYSTEM CL OCK PIN t IN SYSTEM CLOCK AT REGISTER t RSU DATA FROM LOGIC ARRAY Ordering Information Speed (ns) Ordering Code 15 CY7C344B-15HC/HI CY7C344B-15JC/JI CY7C344B-15PC/PI CY7C344B-15WC/WI 20 CY7C344B-20HC/HI CY7C344B-20JC/JI CY7C344B-20PC/PI CY7C344B-20WC/WI 25 CY7C344B-25HC/HI CY7C344B-25JC/JI CY7C344B-25PC/PI Document #: 38-03036 Rev ICS t RH Package Name Package Type ...
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... Package Diagrams Document #: 38-03036 Rev. ** 28-Pin Windowed Leaded Chip Carrier H64 CY7C344B 51-80077 Page ...
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... Package Diagrams (continued) Document #: 38-03036 Rev. ** 28-Lead Plastic Leaded Chip Carrier J64 28-Lead (300-Mil) Molded DIP P21 CY7C344B 51-85001-A 51-85014-B Page ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 28-Lead (300-Mil) Windowed CerDIP W22 MIL-STD-1835 D-15 Config. A CY7C344B 51-80087 Page ...
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... Document Title: CY7C344B 32-Macrocell MAX® EPLD Document Number: 38-03036 REV. ECN NO. Issue Date ** 106381 06/15/01 Document #: 38-03036 Rev. ** Orig. of Change Description of Change SZV Change from Spec #: 38-00860 to 38-03036 CY7C344B Page ...