IDTSTAC9750XXTAEC1XR IDT, Integrated Device Technology Inc, IDTSTAC9750XXTAEC1XR Datasheet - Page 36

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IDTSTAC9750XXTAEC1XR

Manufacturer Part Number
IDTSTAC9750XXTAEC1XR
Description
IC CODEC AC'97 2CH VALUE 48-LQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec '97r
Datasheet

Specifications of IDTSTAC9750XXTAEC1XR

Resolution (bits)
18 b, 20 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
85 / 89
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9750XXTAEC1XR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDTSTAC9750XXTAEC1XR
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT™
VALUE-LINE TWO-CHANNEL AC’97 CODECS
STAC9750/9751
VALUE-LINE TWO-CHANNEL AC’97 CODECS
6.5.3.
Mute
Mute
Mute
D15
D15
D15
D7
D7
D7
6.5.2.3.
Default: 8000h
PC Beep Mixer Volume (Index 0Ah)
Default: 0000h
This register controls the level for the PC Beep input. Each step corresponds to approximately 3dB
of attenuation. The MSB of the register is the mute bit. When this bit is set to 1, the level for that
channel is set at -∞dB. PC_BEEP supports motherboard implementations. The intention of routing
PC_BEEP through the STAC9750/9751 mixer is to eliminate the requirement for an onboard
speaker by guaranteeing a connection to speakers connected via the output jack. In order for this to
be viable, the PC_BEEP signal needs to reach the output jack at all times. NOTE: the PC_BEEP is
routed to the mono outputs when the STAC9750/9751 is in a RESET state. This is so that Power On
Self Test (POST) codes can be heard by the user in case of a hardware problem with the PC. For
further PC_BEEP implementation details please refer to the AC'97 Technical FAQ sheet. The default
value is 0000h, which corresponds to 0 dB attenuation with mute off.
Note: If optional bits D13 & D5 of register 04h are set to 1, then the corresponding attenuation is set to
Note: If optional bit D5 of register 06h is set to 1, then the corresponding attenuation is set to 46.5dB and the
Note: PC_BEEP defaults to 0000h, mute off.
Reserved
Reserved
46.5dB and the register reads will produce 1Fh as a value for this attenuation/gain block.
register reads will produce 1Fh as a value for this attenuation/gain block.
Mute
Reserved
RSRVD
0
0
1
D14
D14
D14
D6
D6
D6
Master Volume MONO (06h)
HPR5
HPL5
MM5
D13
D13
D13
D5
D5
D5
PV3…PV0
0000
1111
xxxx
Table 17. PC_BEEP Register
HPR4
HPL4
MM4
D12
D12
D12
PV3
36
D4
D4
D4
Reserved
Reserved
HPR3
HPL3
MM3
PV2
D11
D11
D11
D3
D3
D3
STAC9750/9751
HPR2
HPL2
MM2
PV1
D10
D10
D10
D2
D2
D2
45 dB Attenuation
∞ dB Attenuation
0 dB Attenuation
Function
HPR1
HPL1
MM1
PV0
D9
D1
D9
D1
D9
D1
PC AUDIO
V 5.8 103106
RSRVD
HPR0
HPL0
MM0
D8
D0
D8
D0
D8
D0

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