EMC2101-R-ACZL-TR SMSC, EMC2101-R-ACZL-TR Datasheet - Page 51

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EMC2101-R-ACZL-TR

Manufacturer Part Number
EMC2101-R-ACZL-TR
Description
Board Mount Temperature Sensors Single Fan Controller
Manufacturer
SMSC
Datasheet

Specifications of EMC2101-R-ACZL-TR

Full Temp Accuracy
+/- 2 C , +/- 3 C
Package / Case
MSOP
Output Type
Analog
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
SMBus Fan Control with 1°C Accurate Temperature Monitoring
Datasheet
Appendix A Advanced PWM Options
APPLICATION NOTE: If the Fan Setting is set at a value that is higher than 2x the PWM Frequency Register
SMSC EMC2101
EFFECTIVE _ DUTY _ CYCLE
EFFECTIVE _ RESOLUTION
The PWM Frequency Register determines the number of clocks (set by the CLK_SEL bit or the
PWM_D register settings) represent 1/2 of the period of the final PWM output waveform. Therefore,
as the PWM Frequency Register is updated, the PWM frequency is likewise updated. However, it also
directly affects the PWM Resolution and PWM duty cycle.
The PWM frequency is set according to
Register is used,
The PWM Frequency Register does not affect the Fan Setting (either the Fan Setting Register or the
Fan Setting entries in the Fan Control Look-up Table Registers).
The Fan Setting Register determines the number of clocks that the PWM output is high for is always
based on 64 time steps for a PWM cycle. As the PWM Frequency Register changes (or the Fan Setting
changes) the effective duty cycle will vary according to
according to
respect to the overall PWM period determined by the PWM Frequency Register.
Table A.1
setting is changed.
PWM _ FREQUENCY
PWM _ FREQUENCY
settings, the PWM output will be at 100% duty cycle.
shows the effective resolution, duty cycle, and frequency as the PWM Frequency Register
Equation
Equation [5]
=
FAN _ SETTING
--------------------------------------------
[7]. This is a result of the “on” time determined by Fan Setting changing with
PWM _ F 2
=
=
=
-----------------------------
2 xPWM _F
-----------------------------
2 xPWM _F
------------------------------- -
PWM _ F 2
(see
360 k
1.4 k
100%
×
DATASHEET
Section 6.20, "PWM Frequency Divide Register," on page
×
×
100%
Equation [8]
51
Where: PWM_F is the setting of the PWM
Where: PWM_F is the setting of the PWM
Equation [6]
or
Where: PWM_F is the setting of the
PWM_D is the setting of the PWM
Frequency Divide Register (4Eh)
Frequency Register (4Dh)
Equation [9]
Frequency Register (4Dh)
PWM Frequency register (4Dh)
CLK_SEL = ‘0’
CLK_SEL = ‘1’
and the PWM resolution will vary
below or, if the PWM Divide
Revision 2.54 (06-16-09)
44).
[6]
[7]
[8]
[9]

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