EMC2305-1-AP-TR SMSC, EMC2305-1-AP-TR Datasheet - Page 13

• Manufacturer Part Number: EMC2305-1-AP-TR
• Description: Industrial Temperature Sensors Penta RPM-Based PWN Fan Speed Controller
• Manufacturer: SMSC

Specifications of EMC2305-1-AP-TR

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Multiple RPM-Based PWM Fan Controller for Five Fans
Datasheet
Chapter 3 Communications
SMSC EMC2305
3.1
3.1.1
3.1.2
SMDATA
SMCLK
The EMC2305 communicates with a host controller, such as an SMSC SIO, through the SMBus. The
SMBus is a two-wire serial communication protocol between a computer host and its peripheral
devices. A detailed timing diagram is shown in
however, the EMC2305 will not stretch the clock signal.
SMBus Start Bit
The SMBus Start bit is defined as a transition of the SMBus Data line from a logic ‘1’ state to a logic
‘0’ state while the SMBus Clock line is in a logic ‘1’ state.
SMBus Address and RD / WR Bit
The SMBus Address Byte consists of the 7-bit client address followed by a RD / WR indicator bit. If
this RD / WR bit is a logic ‘0’, then the SMBus Host is writing data to the client device. If this RD / WR
bit is a logic ‘1’, then the SMBus Host is reading data from the client device.
The SMBus client will respond to one of multiple SMBus addresses determined by the pull-up resistor
on the ADDR_SEL pin. The ADDR_SEL pin decodes one of six pull-up resistors upon device power
up. Depending on the resistor used, the CLK pin may also be used to select additional functionality.
System Management Bus Interface Protocol
P
T
BUF
S
T
T
S - Start Condition
LOW
HD:STA
T
HD:DAT
T
RISE
Figure 3.1 SMBus Timing Diagram
T
HIGH
DATASHEET
T
SU:DAT
T
FALL
13
Figure
3.1. Stretching of the SMCLK signal is supported;
S
T
T
SU:STA
HD:STA
P - Stop Condition
Revision 1.2 (03-22-10)
T
SU:STO
P