EMC1402-4-ACZL-TR SMSC, EMC1402-4-ACZL-TR Datasheet - Page 12

no-image

EMC1402-4-ACZL-TR

Manufacturer Part Number
EMC1402-4-ACZL-TR
Description
Board Mount Temperature Sensors Dual Temp Snsr
Manufacturer
SMSC
Datasheet

Specifications of EMC1402-4-ACZL-TR

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Chapter 4 System Management Bus Interface Protocol
.
Revision 1.36 (07-02-09)
4.1
4.2
START
SMCLK
SMDTA
1 -> 0
TheEMC1402 communicates with a host controller, such as an SMSC SIO, through the SMBus. The
SMBus is a two-wire serial communication protocol between a computer host and its peripheral
devices. A detailed timing diagram is shown in
For the first 15ms after power-up the device may not respond to SMBus communications.
The EMC1402 is SMBus 2.0 compatible and support Send Byte, Read Byte, Write Byte, Receive Byte,
and the Alert Response Address as valid protocols as shown below.
All of the below protocols use the convention in
Attempting to communicate with the EMC1402 SMBus interface with an invalid slave address or invalid
protocol will result in no response from the device and will not affect its register contents. Stretching
of the SMCLK signal is supported, provided other devices on the SMBus control the timing.
The Write Byte is used to write one byte of data to the registers as shown below
ADDRESS
System Management Bus Interface Protocol
Write Byte
P
1001_100
SLAVE
T
BUF
S
T
T
S - Start Condition
HD:STA
LOW
WR
0
T
HD:DAT
T
RISE
Figure 4.1 SMBus Timing Diagram
# of bits sent
DATA SENT
ACK
TO DEVICE
Table 4.2 Write Byte Protocol
0
Table 4.1 Protocol Format
T
HIGH
DATASHEET
REGISTER
ADDRESS
T
SU:DAT
XXh
T
12
FALL
DATA SENT TO
# of bits sent
THE HOST
Figure
Table
4.1.
4.1.
ACK
0
1°C Temperature Sensor with Beta Compensation
S
T
T
SU:STA
REGISTER
HD:STA
DATA
XXh
P - Stop Condition
Table
ACK
0
SMSC EMC1402
4.2:
T
SU:STO
Datasheet
0 -> 1
STOP
P

Related parts for EMC1402-4-ACZL-TR