MAX9867ETJ+ Maxim Integrated Products, MAX9867ETJ+ Datasheet - Page 48

IC STEREO AUD CODEC LP 32TQFN-EP

MAX9867ETJ+

Manufacturer Part Number
MAX9867ETJ+
Description
IC STEREO AUD CODEC LP 32TQFN-EP
Manufacturer
Maxim Integrated Products
Type
Stereo Audior
Datasheet

Specifications of MAX9867ETJ+

Data Interface
I²C, Serial
Resolution (bits)
18 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
85 / 90
Voltage - Supply, Analog
1.65 V ~ 1.95 V
Voltage - Supply, Digital
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Ultra-Low Power Stereo Audio Codec
The slave address with the R/W bit set to 0 indicates
that the master intends to write data to the MAX9867.
The MAX9867 acknowledges receipt of the address
byte during the master-generated 9th SCL pulse.
The second byte transmitted from the master config-
ures the MAX9867’s internal register address pointer.
The pointer tells the MAX9867 where to write the next
byte of data. An acknowledge pulse is sent by the
MAX9867 upon receipt of the address pointer data.
The third byte sent to the MAX9867 contains the data
that is written to the chosen register. An acknowledge
pulse from the MAX9867 signals receipt of the data byte.
The address pointer autoincrements to the next register
address after each received data byte. This autoincre-
ment feature allows a master to write to sequential regis-
ters within one continuous frame. Figure 13 illustrates
how to write to multiple registers with one frame. The
master signals the end of transmission by issuing a
STOP condition. Register addresses greater than 0x17
are reserved. Do not write to these addresses.
Send the slave address with the R/W bit set to 1 to initi-
ate a read operation. The MAX9867 acknowledges
receipt of its slave address by pulling SDA low during
the 9th SCL clock pulse. A START command followed
by a read command resets the address pointer to reg-
ister 0x00.
Figure 13. Writing n Bytes of Data to the MAX9867
Figure 14. Reading 1 Byte of Data from the MAX9867
48
ACKNOWLEDGE FROM MAX9867
S
______________________________________________________________________________________
S
ACKNOWLEDGE FROM MAX9867
SLAVE ADDRESS
SLAVE ADDRESS
R/W
R/W
0
0
A
A
ACKNOWLEDGE FROM MAX9867
ACKNOWLEDGE FROM MAX9867
REGISTER ADDRESS
Read Data Format
REGISTER ADDRESS
REPEATED START
A
ACKNOWLEDGE FROM MAX9867
A
B7 B6
Sr
ACKNOWLEDGE FROM MAX9867
The first byte transmitted from the MAX9867 is the con-
tent of register 0x00. Transmitted data is valid on the
rising edge of SCL. The address pointer autoincre-
ments after each read data byte. This autoincrement
feature allows all registers to be read sequentially within
one continuous frame. A STOP condition can be issued
after any number of read data bytes. If a STOP condi-
tion is issued followed by another read operation, the
first data byte to be read is from register 0x00.
The address pointer can be preset to a specific register
before a read command is issued. The master presets
the address pointer by first sending the MAX9867’s
slave address with the R/W bit set to 0 followed by the
register address. A REPEATED START condition is then
sent followed by the slave address with the R/W bit set
to 1. The MAX9867 then transmits the contents of the
specified register. The address pointer autoincrements
after transmitting the first byte.
The master acknowledges receipt of each read byte
during the acknowledge clock pulse. The master must
acknowledge all correctly received bytes except the
last byte. The final byte must be followed by a not
acknowledge from the master and then a STOP condi-
tion. Figure 14 illustrates the frame format for reading 1
byte from the MAX9867. Figure 15 illustrates the frame
format for reading multiple bytes from the MAX9867.
B5 B4
DATA BYTE 1
SLAVE ADDRESS
1 BYTE
B3 B2
REGISTER ADDRESS POINTER
AUTOINCREMENT INTERNAL
B1 B0
R/W
A
1
NOT ACKNOWLEDGE FROM MASTER
A
ACKNOWLEDGE FROM MAX9867
B7 B6
B5 B4
DATA BYTE
DATA BYTE n
1 BYTE
REGISTER ADDRESS POINTER
AUTOINCREMENT INTERNAL
1 BYTE
B3 B2
B1 B0
A
A
P
P

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