MAX1455AAE-T Maxim Integrated Products, MAX1455AAE-T Datasheet - Page 15

• Manufacturer Part Number: MAX1455AAE-T
• Description: Board Mount Temperature Sensors Automotive Sensor Signal Conditioner
• Manufacturer: Maxim Integrated Products

Specifications of MAX1455AAE-T

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

and stored in the upper 3 bits of EEPROM location
161hex (EEPROM upper configuration byte).
The MAX1455 internal clock controls timing functions,
including the signal path gain, DAC functions, and com-
munications. It is recommended that, while in digital
mode, the Configuration register CLK bits be assigned
the values contained in EEPROM (upper configuration
byte). The 3 CLK bits represent a two’s-complement
number with a nominal clock adjustment of 9% per bit.
Table 12 shows the codes and adjustment available.
Any change to the CLK bit values contained in the
Configuration register must be followed by the
MAX1455 baud rate learning sequence (reinitialize and
initialize commands). To maximize the robustness of
the communication system during clock resetting only,
change the CLK bits by 1LSB value at a time. The rec-
Table 8. Control Location (CL[15:0])
Table 9. IRSA Decoding
FIELD
1100 to 1110
IRSA[3:0]
15:8
7:0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1111
CL[15:8]
CL[7:0]
NAME
______________________________________________________________________________________
Write IRSD[3:0] to DHR[3:0] (Data Hold register)
Write IRSD[3:0] to DHR[7:4] (Data Hold register)
Write IRSD[3:0] to DHR[11:8] (Data Hold register)
Write IRSD[3:0] to DHR[15:12] (Data Hold register)
Reserved
Reserved
Write IRSD[3:0] to ICRA[3:0] or IEEA[3:0] (Internal Calibration register address or internal EEPROM address
nibble 0)
Write IRSD[3:0] to IEEA[7:4] (internal EEPROM address, nibble 1)
Write IRSD[3:0] to IRSP[3:0] or IEEA[9:8] (Interface register set pointer where IRSP[1:0] is IEEA[9:8])
Write IRSD[3:0] to CRIL[3:0] (Command register to internal logic)
Write IRSD[3:0] to ATIM[3:0] (analog timeout value on read)
Write IRSD[3:0] to ALOC[3:0] (analog location)
Reserved
Write IRSD[3:0] = 1111bin to relearn the baud rate
Reserved
Control Location. Secure-Lock is activated by setting this to FFhex, which disables DIO serial
communications and connects OUT to PGA output.
Low-Cost Automotive Sensor Signal
ommended setting procedure for the Configuration reg-
ister CLK bits is, therefore, as follows. (Use a minimum
baud rate of 9600 during the setting procedure to pre-
vent potential overflow of the MAX1455 baud rate
counter with clock values near maximum.)
The following example is based on a required CLK
code of 010 binary:
1) Read the CLK bits (3MSBs) from EEPROM location
2) Set the CLK bits in the Configuration register to 001
3) Send the reinitialize command, followed by the ini-
4) Set the CLK bits in the Configuration register to 010
DESCRIPTION
161hex. CLK = 010 binary.
binary.
tialize (baud rate learning) command.
binary.
DESCRIPTION
Conditioner
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