EMC1423-1-AIZLTR SMSC, EMC1423-1-AIZLTR Datasheet - Page 38

• Manufacturer Part Number: EMC1423-1-AIZLTR
• Description: Board Mount Temperature Sensors TRIPLE TEMP SNSR
• Manufacturer: SMSC

Specifications of EMC1423-1-AIZLTR

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Revision 1.36 (07-02-09)
6.13
ADDR.
22h
R/W
R/W
Bit 2 - E2MASK - Masks the ALERT pin from asserting when the External Diode 2 channel is out of
limit or reports a diode fault.
Bit 1 - E1MASK - Masks the ALERT pin from asserting when the External Diode 1 channel is out of
limit or reports a diode fault.
Bit 0 - INTMASK - Masks the ALERT pin from asserting when the Internal Diode temperature is out
of limit.
The Consecutive ALERT Register determines how many times an out-of-limit error or diode fault must
be detected in consecutive measurements before the ALERT or SYS_SHDN pin is asserted.
Additionally, the Consecutive ALERT Register controls the SMBus Timeout functionality.
An out-of-limit condition (i.e. HIGH, LOW, or FAULT) occurring on the same temperature channel in
consecutive measurements will increment the consecutive alert counter. The counters will also be reset
if no out-of-limit condition or diode fault condition occurs in a consecutive reading.
When the ALERT pin is configured as an interrupt, when the consecutive alert counter reaches its
programmed value, the following will occur: the STATUS bit(s) for that channel and the last error
condition(s) (i.e. E1HIGH, or E2LOW and/or E2FAULT) will be set to ‘1’, the ALERT pin will be
asserted, the consecutive alert counter will be cleared, and measurements will continue.
When the ALERT pin is configured as a comparator, the consecutive alert counter will ignore diode
fault and low limit errors and only increment if the measured temperature exceeds the High Limit.
Additionally, once the consecutive alert counter reaches the programmed limit, the ALERT pin will be
asserted, but the counter will not be reset. It will remain set until the temperature drops below the High
Limit minus the THERM Hysteresis value.
For example, if the CALRT[2:0] bits are set for 4 consecutive alerts on an EMC1423 device, the high
limits are set at 70°C, and none of the channels are masked, then the ALERT pin will be asserted after
the following four measurements:
1. Internal Diode reads 71°C and both external diodes read 69°C. Consecutive alert counter for INT
Consecutive ALERT Register
‘0’ (default) - The External Diode 3 channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode 3 channel will not cause the ALERT pin to be asserted if it is out of limit
or reports a diode fault.
‘0’ (default) - The External Diode 2 channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode 2 channel will not cause the ALERT pin to be asserted if it is out of limit
or reports a diode fault.
‘0’ (default) - The External Diode 1 channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode 1 channel will not cause the ALERT pin to be asserted if it is out of limit
or reports a diode fault.
‘0’ (default) - The Internal Diode channel will cause the ALERT pin to be asserted if it is out of limit.
‘1’ - The Internal Diode channel will not cause the ALERT pin to be asserted if it is out of limit.
is incremented to 1.
Consecutive
REGISTER
ALERT
Table 6.14 Consecutive ALERT Register
TIME
OUT
B7
B6
DATASHEET
CTHRM[2:0]
B5
38
1°C Temperature Sensor with Hardware Thermal Shutdown
B4
B3
CALRT[2:0]
B2
B1
SMSC EMC1423/EMC1424
B0
-
DEFAULT
Datasheet
70h