MCP2515-I/SO Microchip Technology, MCP2515-I/SO Datasheet - Page 38
![IC CAN CONTROLLER W/SPI 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
MCP2515-I/SO
Manufacturer Part Number
MCP2515-I/SO
Description
IC CAN CONTROLLER W/SPI 18SOIC
Manufacturer
Microchip Technology
Specifications of MCP2515-I/SO
Package / Case
18-SOIC (7.5mm Width)
Controller Type
CAN Interface
Interface
SPI
Voltage - Supply
2.7 V ~ 5.5 V
Current - Supply
10mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Product
Controller Area Network (CAN)
Number Of Transceivers
1
Data Rate
1 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Supply Current (max)
10 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage Range
2.7V To 5.5V
Driver Case Style
SOIC
No. Of Pins
18
Operating Temperature Range
-40°C To +85°C
Filter Terminals
SMD
Supply Voltage Min
2.7V
Rohs Compliant
Yes
Clock Frequency
40MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP2515DM-BM - BOARD DEMO FOR MCP2515/51MCP2515DM-PTPLS - BOARD DAUGHTER PICTAIL MCP2515MCP2515DM-PCTL - BOARD DEMO FOR MCP2515DV251001 - KIT DEVELOPMENT CAN MCP2510
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCP2515-I/SO
Manufacturer:
TI
Quantity:
1 000
Part Number:
MCP2515-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
MCP2515
PROPAGATION SEGMENT
The Propagation Segment (PropSeg) exists to
compensate for physical delays between nodes. The
propagation delay is defined as twice the sum of the
signal’s propagation time on the bus line, including the
delays associated with the bus driver. The PropSeg is
programmable from 1 – 8 TQ.
PHASE SEGMENT 1 (PS1) AND PHASE
SEGMENT 2 (PS2)
The two phase segments, PS1 and PS2, are used to
compensate for edge phase errors on the bus. PS1 can
be lengthened (or PS2 shortened) by resyncronization.
PS1 is programmable from 1 – 8 TQ and PS2 is
programmable from 2 – 8 TQ.
SAMPLE POINT
The sample point is the point in the bit time at which the
logic level is read and interpreted. The sample point is
located at the end of PS1. The exception to this rule is
if the sample mode is configured to sample three times
per bit. In this case, while the bit is still sampled at the
end of PS1, two additional samples are taken at one-
half TQ intervals prior to the end of PS1, with the value
of the bit being determined by a majority decision.
INFORMATION PROCESSING TIME
The Information Processing Time (IPT) is the time
required for the logic to determine the bit level of a
sampled bit. The IPT begins at the sample point, is
measured in TQ and is fixed at 2 TQ for the Microchip
CAN module. Since PS2 also begins at the sample
point and is the last segment in the bit time, it is
required that the PS2 minimum is not less than the IPT.
FIGURE 5-2:
DS21801F-page 38
t
T
t
OSC
BIT
BRPCLK
(fixed)
TQ AND THE BIT PERIOD
Sync
(t
TQ
TQ
)
(Programmable)
PropSeg
CAN Bit Time
(Programmable)
Therefore:
SYNCHRONIZATION JUMP WIDTH
The Synchronization Jump Width (SJW) adjusts the bit
clock as necessary by 1 – 4 TQ (as configured) to
maintain
message. Synchronization is covered in more detail
later in this data sheet.
Time Quantum
Each of the segments that make up a bit time are made
up of integer units called Time Quanta (TQ). The length
of each Time Quantum is based on the oscillator period
(t
Figure 5-2
T
period (t
programmable prescaler, called the Baud Rate
Prescaler (BRP). This is illustrated in the following
equation:
EQUATION 5-2:
PS1
OSC
OSC
Where: BRP equals the configuration as shown in
). The base TQ equals twice the oscillator period.
and TQ. The TQ length equals one TQ clock
BRPCLK
Register 5-1.
TQ
shows how the bit period is derived from
synchronization
=
PS2 min
), which is programmable using a
2 BRP T OSC
(Programmable)
⋅
© 2010 Microchip Technology Inc.
=
PS2
⋅
IPT
with
=
=
2TQ
2 BRP
------------------ -
F OSC
the
⋅
transmitted